#
# Copyright (c) Hisilicon Technologies Co., Ltd. 2021-2021. All rights reserved.
#

INCLUDE_DIR += \
	-I$(HVGR_PATH)/sch \
	-I$(HVGR_PATH)/sch/cq \
	-I$(HVGR_PATH)/sch/cq/sched \
	-I$(HVGR_PATH)/sch/cq/driver \
	-I$(HVGR_PATH)/sch/cq/driver/$(CHIP_VER_DIR) \
	-I$(HVGR_PATH)/sch/cq/sched/ctx_sched/$(CHIP_VER_DIR) \
	-I$(HVGR_PATH)/sch/cq/sched/sched_policy \
	-I$(HVGR_PATH)/sch/cq/sched/sched_policy/$(CHIP_VER_DIR) \
	-I$(HVGR_PATH)/sch/softjob
SRC += \
	$(HVGR_ROOT)/sch/cq/hvgr_cq.c \
	$(HVGR_ROOT)/sch/cq/hvgr_cq_queue.c \
	$(HVGR_ROOT)/sch/cq/sched/ctx_sched/$(CHIP_VER_DIR)/hvgr_ctx_sched.c  \
	$(HVGR_ROOT)/sch/cq/sched/hvgr_cq_schedule.c \
	$(HVGR_ROOT)/sch/cq/sched/sched_policy/hvgr_sch_policy_manager.c \
	$(HVGR_ROOT)/sch/cq/sched/sched_policy/$(CHIP_VER_DIR)/hvgr_sch_policy_default.c \
	$(HVGR_ROOT)/sch/cq/driver/hvgr_cq_driver_base.c \
	$(HVGR_ROOT)/sch/cq/driver/$(CHIP_VER_DIR)/hvgr_cq_driver_adapt.c \
	$(HVGR_ROOT)/sch/cq/driver/$(CHIP_VER_DIR)/hvgr_cq_sch_adapter.c \
	$(HVGR_ROOT)/sch/cq/hvgr_sch_dfx.c

ifeq ($(HVGR_SSID_PWR), 1)
	INCLUDE_DIR += -I$(HVGR_PATH)/sch/cq/ssid/$(CHIP_VER_DIR)
	SRC += $(HVGR_ROOT)/sch/cq/ssid/$(CHIP_VER_DIR)/hvgr_ssid.c
endif

ifeq ($(CONFIG_DFX_DEBUG_FS), y)
	INCLUDE_DIR += -I$(HVGR_PATH)/sch/cq/debug
	SRC += \
		$(HVGR_ROOT)/sch/cq/driver/$(CHIP_VER_DIR)/hvgr_cq_debug_switch.c \
		$(HVGR_ROOT)/sch/cq/debug/$(CHIP_VER_DIR)/hvgr_sch_debug_dfx.c \
		$(HVGR_ROOT)/sch/cq/debug/hvgr_sch_debug_dfx_base.c
endif

ifeq ($(HVGR_SUBMIT_ASYNC), 1)
	SRC += $(HVGR_ROOT)/sch/cq/sched/hvgr_cq_schedule_submit_async.c
else
	SRC += $(HVGR_ROOT)/sch/cq/sched/hvgr_cq_schedule_submit_sync.c
endif

ifeq ($(HVGR_FEATURE_PROTECT_MODE), 1)
	SRC += $(HVGR_ROOT)/sch/cq/hvgr_protect_mode.c
endif