#
# Copyright (c) Hisilicon Technologies Co., Ltd. 2021-2021. All rights reserved.
#

INCLUDE_DIR += \
	-I$(HVGR_PATH)/dm \
	-I$(HVGR_PATH)/dm/driver \
	-I$(HVGR_PATH)/dm/driver/$(CHIP_VER_DIR) \
	-I$(HVGR_PATH)/dm/fcp \
	-I$(HVGR_PATH)/dm/fcp/driver/$(CHIP_VER_DIR) \
	-I$(HVGR_PATH)/dm/dmd

SRC += \
	$(HVGR_ROOT)/dm/hvgr_dm.c \
	$(HVGR_ROOT)/dm/hvgr_dm_ioctl.c \
	$(HVGR_ROOT)/dm/hvgr_dm_ctx.c \
	$(HVGR_ROOT)/dm/driver/hvgr_dm_driver_base.c \
	$(HVGR_ROOT)/dm/driver/$(CHIP_VER_DIR)/hvgr_dm_driver_adapt.c \
	$(HVGR_ROOT)/dm/fcp/hvgr_fcp.c \
	$(HVGR_ROOT)/dm/fcp/driver/$(CHIP_VER_DIR)/hvgr_fcp_driver_adapt.c \
	$(HVGR_ROOT)/dm/dmd/hvgr_dmd.c

ifeq ($(CONFIG_HVGR_DFX_SH), y)
	SRC += $(HVGR_ROOT)/dm/dmd/hvgr_dmd_dfx.c
endif

ifeq ($(HVGR_USE_PCIE), 1)
	SRC += $(HVGR_ROOT)/dm/driver/hvgr_pcie.c
else
	SRC += $(HVGR_ROOT)/dm/driver/hvgr_soc.c
endif
