machine_qemu.cc Source File

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machine_qemu.cc
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1 /*
2  * Copyright (C) 2006-2009 Anders Gavare. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * 1. Redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution.
12  * 3. The name of the author may not be used to endorse or promote products
13  * derived from this software without specific prior written permission.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  *
28  * COMMENT: Machine mimicing QEMU's default MIPS emulation mode
29  *
30  * See e.g. http://fabrice.bellard.free.fr/qemu/mips-test-0.2.tar.gz
31  */
32 
33 #include <stdio.h>
34 #include <stdlib.h>
35 #include <string.h>
36 
37 #include "bus_isa.h"
38 #include "cpu.h"
39 #include "device.h"
40 #include "devices.h"
41 #include "machine.h"
42 #include "memory.h"
43 #include "misc.h"
44 
45 
46 MACHINE_SETUP(qemu_mips)
47 {
48  char tmpstr[300];
49 
50  machine->machine_name = strdup("QEMU MIPS");
52 
53  /*
54  * An ISA bus, I/O ports at 0x14000000, memory at 0x10000000,
55  * connected to MIPS irq 2:
56  */
57  snprintf(tmpstr, sizeof(tmpstr), "%s.cpu[%i].2",
60  0x14000000ULL, 0x10000000ULL);
61 
62  if (!machine->prom_emulation)
63  return;
64 
65  /*
66  * Registers at startup do not seem to be defined in QEMU, but
67  * bootargs and memory size are placed just below 16 MB.
68  *
69  * Remember to start the emulator with options, e.g.:
70  *
71  * -o "console=ttyS0 root=/dev/ram rd_start=0x80800000
72  * rd_size=10000000 init=/bin/sh"
73  */
74 
75  store_string(cpu, (int32_t)(0x80000000 + 16*1048576 - 256),
77  store_32bit_word(cpu, (int32_t)(0x80000000 + 16*1048576 - 260),
78  0x12345678);
79  store_32bit_word(cpu, (int32_t)(0x80000000 + 16*1048576 - 264),
80  machine->physical_ram_in_mb * 1048576);
81 }
82 
83 
85 {
86  /* QEMU emulates a MIPS32 rev 1, so 4Kc will do just fine. */
87  machine->cpu_name = strdup("4Kc");
88 }
89 
90 
92 {
94 }
95 
96 
97 MACHINE_REGISTER(qemu_mips)
98 {
99  MR_DEFAULT(qemu_mips, "QEMU MIPS", ARCH_MIPS, MACHINE_QEMU_MIPS);
100  me->set_default_ram = machine_default_ram_qemu_mips;
101  machine_entry_add_alias(me, "qemu_mips");
102 }
103 
machine::bootstrap_cpu
int bootstrap_cpu
Definition: machine.h:136
machine::physical_ram_in_mb
int physical_ram_in_mb
Definition: machine.h:147
bus_isa.h
cpu::byte_order
uint8_t byte_order
Definition: cpu.h:347
EMUL_BIG_ENDIAN
#define EMUL_BIG_ENDIAN
Definition: misc.h:165
machine::prom_emulation
int prom_emulation
Definition: machine.h:149
MACHINE_SETUP
MACHINE_SETUP(qemu_mips)
Definition: machine_qemu.cc:46
device.h
machine::boot_string_argument
char * boot_string_argument
Definition: machine.h:171
BUS_ISA_IDE0
#define BUS_ISA_IDE0
Definition: bus_isa.h:58
BUS_ISA_IDE1
#define BUS_ISA_IDE1
Definition: bus_isa.h:59
ARCH_MIPS
#define ARCH_MIPS
Definition: machine.h:203
MACHINE_REGISTER
MACHINE_REGISTER(qemu_mips)
Definition: machine_qemu.cc:97
machine::cpu_name
char * cpu_name
Definition: machine.h:133
misc.h
machine.h
machine
Definition: machine.h:97
MR_DEFAULT
#define MR_DEFAULT(x, name, arch, type)
Definition: machine.h:370
store_string
void store_string(struct cpu *cpu, uint64_t addr, const char *s)
Definition: memory.cc:695
MACHINE_DEFAULT_RAM
MACHINE_DEFAULT_RAM(qemu_mips)
Definition: machine_qemu.cc:91
cpu.h
machine::path
char * path
Definition: machine.h:108
MACHINE_QEMU_MIPS
#define MACHINE_QEMU_MIPS
Definition: machine.h:221
bus_isa_init
struct bus_isa_data * bus_isa_init(struct machine *machine, char *interrupt_base_path, uint32_t bus_isa_flags, uint64_t isa_portbase, uint64_t isa_membase)
Definition: bus_isa.cc:174
store_32bit_word
int store_32bit_word(struct cpu *cpu, uint64_t addr, uint64_t data32)
Definition: memory.cc:783
MACHINE_DEFAULT_CPU
MACHINE_DEFAULT_CPU(qemu_mips)
Definition: machine_qemu.cc:84
devices.h
machine::machine_name
const char * machine_name
Definition: machine.h:115
cpu
Definition: cpu.h:326
machine_entry_add_alias
void machine_entry_add_alias(struct machine_entry *me, const char *name)
Definition: machine.cc:697
memory.h

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