dev_iq80321_7seg.cc Source File

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dev_iq80321_7seg.cc
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1 /*
2  * Copyright (C) 2006-2009 Anders Gavare. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * 1. Redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution.
12  * 3. The name of the author may not be used to endorse or promote products
13  * derived from this software without specific prior written permission.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  *
28  * COMMENT: IQ80321 LED device
29  *
30  * Should work with NetBSD's iq80321_7seg.c.
31  *
32  * TODO: Graphical output of LED lines?
33  */
34 
35 #include <stdio.h>
36 #include <stdlib.h>
37 #include <string.h>
38 
39 #include "cpu.h"
40 #include "device.h"
41 #include "machine.h"
42 #include "memory.h"
43 #include "misc.h"
44 
45 
47  uint8_t msb, lsb;
48 };
49 
50 
51 DEVICE_ACCESS(iq80321_7seg)
52 {
53  struct iq80321_7seg_data *d = (struct iq80321_7seg_data *) extra;
54  uint64_t idata = 0, odata = 0;
55 
56  if (writeflag == MEM_WRITE)
57  idata = memory_readmax64(cpu, data, len);
58 
59  switch (relative_addr) {
60 
61  case 0: if (writeflag == MEM_READ)
62  odata = d->msb;
63  else {
64  d->msb = idata;
65  debug("[ iq80321_7seg: setting MSB to 0x%02x ]\n",
66  (int)idata);
67  }
68  break;
69 
70  case 0x10000:
71  if (writeflag == MEM_READ)
72  odata = d->lsb;
73  else {
74  d->lsb = idata;
75  debug("[ iq80321_7seg: setting LSB to 0x%02x ]\n",
76  (int)idata);
77  }
78  break;
79 
80  default:if (writeflag == MEM_READ) {
81  fatal("[ iq80321_7seg: read from 0x%x ]\n",
82  (int)relative_addr);
83  } else {
84  fatal("[ iq80321_7seg: write to 0x%x: 0x%llx ]\n",
85  (int)relative_addr, (long long)idata);
86  }
87  exit(1);
88  }
89 
90  if (writeflag == MEM_READ)
91  memory_writemax64(cpu, data, len, odata);
92 
93  return 1;
94 }
95 
96 
97 DEVINIT(iq80321_7seg)
98 {
99  struct iq80321_7seg_data *d;
100 
101  CHECK_ALLOCATION(d = (struct iq80321_7seg_data *) malloc(sizeof(struct iq80321_7seg_data)));
102  memset(d, 0, sizeof(struct iq80321_7seg_data));
103 
104  /* 0xfe840000 and 0xfe850000 */
106  devinit->addr, 0x10004, dev_iq80321_7seg_access, d,
107  DM_DEFAULT, NULL);
108 
109  return 1;
110 }
111 
112 
data
u_short data
Definition: siireg.h:79
debug
#define debug
Definition: dev_adb.cc:57
DEVINIT
DEVINIT(iq80321_7seg)
Definition: dev_iq80321_7seg.cc:97
devinit::addr
uint64_t addr
Definition: device.h:46
memory_device_register
void memory_device_register(struct memory *mem, const char *, uint64_t baseaddr, uint64_t len, int(*f)(struct cpu *, struct memory *, uint64_t, unsigned char *, size_t, int, void *), void *extra, int flags, unsigned char *dyntrans_data)
Definition: memory.cc:339
iq80321_7seg_data::lsb
uint8_t lsb
Definition: dev_iq80321_7seg.cc:47
MEM_READ
#define MEM_READ
Definition: memory.h:116
DM_DEFAULT
#define DM_DEFAULT
Definition: memory.h:130
devinit::machine
struct machine * machine
Definition: device.h:41
device.h
MEM_WRITE
#define MEM_WRITE
Definition: memory.h:117
fatal
void fatal(const char *fmt,...)
Definition: main.cc:152
misc.h
memory_readmax64
uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
Definition: memory.cc:55
machine.h
devinit::name
char * name
Definition: device.h:43
devinit
Definition: device.h:40
iq80321_7seg_data::msb
uint8_t msb
Definition: dev_iq80321_7seg.cc:47
cpu.h
machine::memory
struct memory * memory
Definition: machine.h:126
iq80321_7seg_data
Definition: dev_iq80321_7seg.cc:46
DEVICE_ACCESS
DEVICE_ACCESS(iq80321_7seg)
Definition: dev_iq80321_7seg.cc:51
memory_writemax64
void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len, uint64_t data)
Definition: memory.cc:89
cpu
Definition: cpu.h:326
memory.h
CHECK_ALLOCATION
#define CHECK_ALLOCATION(ptr)
Definition: misc.h:239

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