tmp_arm_loadstore_p1_u0_w1.cc Source File
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tmp_arm_loadstore_p1_u0_w1.cc
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/* AUTOMATICALLY GENERATED! Do not edit. */
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#include <stdio.h>
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#include <stdlib.h>
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#include "
cpu.h
"
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#include "
machine.h
"
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#include "
memory.h
"
9
#include "
misc.h
"
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#define DYNTRANS_PC_TO_POINTERS arm_pc_to_pointers
11
#include "
quick_pc_to_pointers.h
"
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#define reg(x) (*((uint32_t *)(x)))
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extern
void
arm_instr_nop
(
struct
cpu
*,
struct
arm_instr_call *);
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extern
void
arm_instr_invalid
(
struct
cpu
*,
struct
arm_instr_call *);
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extern
void
arm_pc_to_pointers
(
struct
cpu
*);
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#define A__NAME__general arm_instr_store_w1_word_u0_p1_imm__general
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#define A__NAME arm_instr_store_w1_word_u0_p1_imm
18
#define A__NAME__eq arm_instr_store_w1_word_u0_p1_imm__eq
19
#define A__NAME__ne arm_instr_store_w1_word_u0_p1_imm__ne
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#define A__NAME__cs arm_instr_store_w1_word_u0_p1_imm__cs
21
#define A__NAME__cc arm_instr_store_w1_word_u0_p1_imm__cc
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#define A__NAME__mi arm_instr_store_w1_word_u0_p1_imm__mi
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#define A__NAME__pl arm_instr_store_w1_word_u0_p1_imm__pl
24
#define A__NAME__vs arm_instr_store_w1_word_u0_p1_imm__vs
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#define A__NAME__vc arm_instr_store_w1_word_u0_p1_imm__vc
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#define A__NAME__hi arm_instr_store_w1_word_u0_p1_imm__hi
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#define A__NAME__ls arm_instr_store_w1_word_u0_p1_imm__ls
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#define A__NAME__ge arm_instr_store_w1_word_u0_p1_imm__ge
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#define A__NAME__lt arm_instr_store_w1_word_u0_p1_imm__lt
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#define A__NAME__gt arm_instr_store_w1_word_u0_p1_imm__gt
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#define A__NAME__le arm_instr_store_w1_word_u0_p1_imm__le
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#define A__NAME_PC arm_instr_store_w1_word_u0_p1_imm_pc
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#define A__NAME_PC__eq arm_instr_store_w1_word_u0_p1_imm_pc__eq
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#define A__NAME_PC__ne arm_instr_store_w1_word_u0_p1_imm_pc__ne
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#define A__NAME_PC__cs arm_instr_store_w1_word_u0_p1_imm_pc__cs
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#define A__NAME_PC__cc arm_instr_store_w1_word_u0_p1_imm_pc__cc
37
#define A__NAME_PC__mi arm_instr_store_w1_word_u0_p1_imm_pc__mi
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#define A__NAME_PC__pl arm_instr_store_w1_word_u0_p1_imm_pc__pl
39
#define A__NAME_PC__vs arm_instr_store_w1_word_u0_p1_imm_pc__vs
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#define A__NAME_PC__vc arm_instr_store_w1_word_u0_p1_imm_pc__vc
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#define A__NAME_PC__hi arm_instr_store_w1_word_u0_p1_imm_pc__hi
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#define A__NAME_PC__ls arm_instr_store_w1_word_u0_p1_imm_pc__ls
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#define A__NAME_PC__ge arm_instr_store_w1_word_u0_p1_imm_pc__ge
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#define A__NAME_PC__lt arm_instr_store_w1_word_u0_p1_imm_pc__lt
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#define A__NAME_PC__gt arm_instr_store_w1_word_u0_p1_imm_pc__gt
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#define A__NAME_PC__le arm_instr_store_w1_word_u0_p1_imm_pc__le
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#define A__W
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#define A__P
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#include "
cpu_arm_instr_loadstore.cc
"
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#undef A__W
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#undef A__P
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#undef A__NAME__eq
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#undef A__NAME__ne
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#undef A__NAME__cs
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#undef A__NAME__cc
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#undef A__NAME__mi
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#undef A__NAME__pl
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#undef A__NAME__vs
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#undef A__NAME__vc
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#undef A__NAME__hi
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#undef A__NAME__ls
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#undef A__NAME__ge
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#undef A__NAME__lt
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#undef A__NAME__gt
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#undef A__NAME__le
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#undef A__NAME_PC__eq
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#undef A__NAME_PC__ne
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#undef A__NAME_PC__cs
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#undef A__NAME_PC__cc
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#undef A__NAME_PC__mi
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#undef A__NAME_PC__pl
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#undef A__NAME_PC__vs
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#undef A__NAME_PC__vc
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#undef A__NAME_PC__hi
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#undef A__NAME_PC__ls
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#undef A__NAME_PC__ge
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#undef A__NAME_PC__lt
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#undef A__NAME_PC__gt
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#undef A__NAME_PC__le
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#undef A__NAME__general
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#undef A__NAME_PC
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#undef A__NAME
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#define A__NAME__general arm_instr_load_w1_word_u0_p1_imm__general
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#define A__NAME arm_instr_load_w1_word_u0_p1_imm
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#define A__NAME__eq arm_instr_load_w1_word_u0_p1_imm__eq
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#define A__NAME__ne arm_instr_load_w1_word_u0_p1_imm__ne
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#define A__NAME__cs arm_instr_load_w1_word_u0_p1_imm__cs
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#define A__NAME__cc arm_instr_load_w1_word_u0_p1_imm__cc
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#define A__NAME__mi arm_instr_load_w1_word_u0_p1_imm__mi
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#define A__NAME__pl arm_instr_load_w1_word_u0_p1_imm__pl
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#define A__NAME__vs arm_instr_load_w1_word_u0_p1_imm__vs
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#define A__NAME__vc arm_instr_load_w1_word_u0_p1_imm__vc
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#define A__NAME__hi arm_instr_load_w1_word_u0_p1_imm__hi
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#define A__NAME__ls arm_instr_load_w1_word_u0_p1_imm__ls
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#define A__NAME__ge arm_instr_load_w1_word_u0_p1_imm__ge
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#define A__NAME__lt arm_instr_load_w1_word_u0_p1_imm__lt
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#define A__NAME__gt arm_instr_load_w1_word_u0_p1_imm__gt
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#define A__NAME__le arm_instr_load_w1_word_u0_p1_imm__le
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#define A__NAME_PC arm_instr_load_w1_word_u0_p1_imm_pc
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#define A__NAME_PC__eq arm_instr_load_w1_word_u0_p1_imm_pc__eq
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#define A__NAME_PC__ne arm_instr_load_w1_word_u0_p1_imm_pc__ne
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#define A__NAME_PC__cs arm_instr_load_w1_word_u0_p1_imm_pc__cs
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#define A__NAME_PC__cc arm_instr_load_w1_word_u0_p1_imm_pc__cc
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#define A__NAME_PC__mi arm_instr_load_w1_word_u0_p1_imm_pc__mi
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#define A__NAME_PC__pl arm_instr_load_w1_word_u0_p1_imm_pc__pl
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#define A__NAME_PC__vs arm_instr_load_w1_word_u0_p1_imm_pc__vs
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#define A__NAME_PC__vc arm_instr_load_w1_word_u0_p1_imm_pc__vc
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#define A__NAME_PC__hi arm_instr_load_w1_word_u0_p1_imm_pc__hi
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#define A__NAME_PC__ls arm_instr_load_w1_word_u0_p1_imm_pc__ls
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#define A__NAME_PC__ge arm_instr_load_w1_word_u0_p1_imm_pc__ge
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#define A__NAME_PC__lt arm_instr_load_w1_word_u0_p1_imm_pc__lt
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#define A__NAME_PC__gt arm_instr_load_w1_word_u0_p1_imm_pc__gt
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#define A__NAME_PC__le arm_instr_load_w1_word_u0_p1_imm_pc__le
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#define A__L
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#define A__W
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#define A__P
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#include "
cpu_arm_instr_loadstore.cc
"
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#undef A__L
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#undef A__W
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#undef A__P
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#undef A__NAME__eq
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#undef A__NAME__ne
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#undef A__NAME__cs
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#undef A__NAME__cc
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#undef A__NAME__mi
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#undef A__NAME__pl
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#undef A__NAME__vs
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#undef A__NAME__vc
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#undef A__NAME__hi
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#undef A__NAME__ls
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#undef A__NAME__ge
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#undef A__NAME__lt
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#undef A__NAME__gt
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#undef A__NAME__le
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#undef A__NAME_PC__eq
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#undef A__NAME_PC__ne
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#undef A__NAME_PC__cs
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#undef A__NAME_PC__cc
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#undef A__NAME_PC__mi
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#undef A__NAME_PC__pl
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#undef A__NAME_PC__vs
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#undef A__NAME_PC__vc
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#undef A__NAME_PC__hi
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#undef A__NAME_PC__ls
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#undef A__NAME_PC__ge
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#undef A__NAME_PC__lt
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#undef A__NAME_PC__gt
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#undef A__NAME_PC__le
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#undef A__NAME__general
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#undef A__NAME_PC
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#undef A__NAME
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#define A__NAME__general arm_instr_store_w1_byte_u0_p1_imm__general
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#define A__NAME arm_instr_store_w1_byte_u0_p1_imm
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#define A__NAME__eq arm_instr_store_w1_byte_u0_p1_imm__eq
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#define A__NAME__ne arm_instr_store_w1_byte_u0_p1_imm__ne
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#define A__NAME__cs arm_instr_store_w1_byte_u0_p1_imm__cs
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#define A__NAME__cc arm_instr_store_w1_byte_u0_p1_imm__cc
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#define A__NAME__mi arm_instr_store_w1_byte_u0_p1_imm__mi
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#define A__NAME__pl arm_instr_store_w1_byte_u0_p1_imm__pl
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#define A__NAME__vs arm_instr_store_w1_byte_u0_p1_imm__vs
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#define A__NAME__vc arm_instr_store_w1_byte_u0_p1_imm__vc
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#define A__NAME__hi arm_instr_store_w1_byte_u0_p1_imm__hi
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#define A__NAME__ls arm_instr_store_w1_byte_u0_p1_imm__ls
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#define A__NAME__ge arm_instr_store_w1_byte_u0_p1_imm__ge
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#define A__NAME__lt arm_instr_store_w1_byte_u0_p1_imm__lt
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#define A__NAME__gt arm_instr_store_w1_byte_u0_p1_imm__gt
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#define A__NAME__le arm_instr_store_w1_byte_u0_p1_imm__le
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#define A__NAME_PC arm_instr_store_w1_byte_u0_p1_imm_pc
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#define A__NAME_PC__eq arm_instr_store_w1_byte_u0_p1_imm_pc__eq
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#define A__NAME_PC__ne arm_instr_store_w1_byte_u0_p1_imm_pc__ne
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#define A__NAME_PC__cs arm_instr_store_w1_byte_u0_p1_imm_pc__cs
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#define A__NAME_PC__cc arm_instr_store_w1_byte_u0_p1_imm_pc__cc
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#define A__NAME_PC__mi arm_instr_store_w1_byte_u0_p1_imm_pc__mi
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#define A__NAME_PC__pl arm_instr_store_w1_byte_u0_p1_imm_pc__pl
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#define A__NAME_PC__vs arm_instr_store_w1_byte_u0_p1_imm_pc__vs
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#define A__NAME_PC__vc arm_instr_store_w1_byte_u0_p1_imm_pc__vc
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#define A__NAME_PC__hi arm_instr_store_w1_byte_u0_p1_imm_pc__hi
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#define A__NAME_PC__ls arm_instr_store_w1_byte_u0_p1_imm_pc__ls
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#define A__NAME_PC__ge arm_instr_store_w1_byte_u0_p1_imm_pc__ge
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#define A__NAME_PC__lt arm_instr_store_w1_byte_u0_p1_imm_pc__lt
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#define A__NAME_PC__gt arm_instr_store_w1_byte_u0_p1_imm_pc__gt
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#define A__NAME_PC__le arm_instr_store_w1_byte_u0_p1_imm_pc__le
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#define A__W
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#define A__B
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#define A__P
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#include "
cpu_arm_instr_loadstore.cc
"
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#undef A__W
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#undef A__B
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#undef A__P
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#undef A__NAME__eq
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#undef A__NAME__ne
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#undef A__NAME__cs
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#undef A__NAME__cc
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#undef A__NAME__mi
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#undef A__NAME__pl
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#undef A__NAME__vs
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#undef A__NAME__vc
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#undef A__NAME__hi
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#undef A__NAME__ls
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#undef A__NAME__ge
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#undef A__NAME__lt
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#undef A__NAME__gt
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#undef A__NAME__le
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#undef A__NAME_PC__eq
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#undef A__NAME_PC__ne
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#undef A__NAME_PC__cs
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#undef A__NAME_PC__cc
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#undef A__NAME_PC__mi
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#undef A__NAME_PC__pl
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#undef A__NAME_PC__vs
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#undef A__NAME_PC__vc
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#undef A__NAME_PC__hi
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#undef A__NAME_PC__ls
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#undef A__NAME_PC__ge
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#undef A__NAME_PC__lt
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#undef A__NAME_PC__gt
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#undef A__NAME_PC__le
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#undef A__NAME__general
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#undef A__NAME_PC
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#undef A__NAME
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#define A__NAME__general arm_instr_load_w1_byte_u0_p1_imm__general
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#define A__NAME arm_instr_load_w1_byte_u0_p1_imm
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#define A__NAME__eq arm_instr_load_w1_byte_u0_p1_imm__eq
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#define A__NAME__ne arm_instr_load_w1_byte_u0_p1_imm__ne
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#define A__NAME__cs arm_instr_load_w1_byte_u0_p1_imm__cs
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#define A__NAME__cc arm_instr_load_w1_byte_u0_p1_imm__cc
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#define A__NAME__mi arm_instr_load_w1_byte_u0_p1_imm__mi
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#define A__NAME__pl arm_instr_load_w1_byte_u0_p1_imm__pl
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#define A__NAME__vs arm_instr_load_w1_byte_u0_p1_imm__vs
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#define A__NAME__vc arm_instr_load_w1_byte_u0_p1_imm__vc
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#define A__NAME__hi arm_instr_load_w1_byte_u0_p1_imm__hi
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#define A__NAME__ls arm_instr_load_w1_byte_u0_p1_imm__ls
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#define A__NAME__ge arm_instr_load_w1_byte_u0_p1_imm__ge
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#define A__NAME__lt arm_instr_load_w1_byte_u0_p1_imm__lt
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#define A__NAME__gt arm_instr_load_w1_byte_u0_p1_imm__gt
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#define A__NAME__le arm_instr_load_w1_byte_u0_p1_imm__le
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#define A__NAME_PC arm_instr_load_w1_byte_u0_p1_imm_pc
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#define A__NAME_PC__eq arm_instr_load_w1_byte_u0_p1_imm_pc__eq
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#define A__NAME_PC__ne arm_instr_load_w1_byte_u0_p1_imm_pc__ne
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#define A__NAME_PC__cs arm_instr_load_w1_byte_u0_p1_imm_pc__cs
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#define A__NAME_PC__cc arm_instr_load_w1_byte_u0_p1_imm_pc__cc
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#define A__NAME_PC__mi arm_instr_load_w1_byte_u0_p1_imm_pc__mi
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#define A__NAME_PC__pl arm_instr_load_w1_byte_u0_p1_imm_pc__pl
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#define A__NAME_PC__vs arm_instr_load_w1_byte_u0_p1_imm_pc__vs
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#define A__NAME_PC__vc arm_instr_load_w1_byte_u0_p1_imm_pc__vc
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#define A__NAME_PC__hi arm_instr_load_w1_byte_u0_p1_imm_pc__hi
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#define A__NAME_PC__ls arm_instr_load_w1_byte_u0_p1_imm_pc__ls
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#define A__NAME_PC__ge arm_instr_load_w1_byte_u0_p1_imm_pc__ge
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#define A__NAME_PC__lt arm_instr_load_w1_byte_u0_p1_imm_pc__lt
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#define A__NAME_PC__gt arm_instr_load_w1_byte_u0_p1_imm_pc__gt
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#define A__NAME_PC__le arm_instr_load_w1_byte_u0_p1_imm_pc__le
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#define A__L
253
#define A__W
254
#define A__B
255
#define A__P
256
#include "
cpu_arm_instr_loadstore.cc
"
257
#undef A__L
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#undef A__W
259
#undef A__B
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#undef A__P
261
#undef A__NAME__eq
262
#undef A__NAME__ne
263
#undef A__NAME__cs
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#undef A__NAME__cc
265
#undef A__NAME__mi
266
#undef A__NAME__pl
267
#undef A__NAME__vs
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#undef A__NAME__vc
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#undef A__NAME__hi
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#undef A__NAME__ls
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#undef A__NAME__ge
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#undef A__NAME__lt
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#undef A__NAME__gt
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#undef A__NAME__le
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#undef A__NAME_PC__eq
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#undef A__NAME_PC__ne
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#undef A__NAME_PC__cs
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#undef A__NAME_PC__cc
279
#undef A__NAME_PC__mi
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#undef A__NAME_PC__pl
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#undef A__NAME_PC__vs
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#undef A__NAME_PC__vc
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#undef A__NAME_PC__hi
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#undef A__NAME_PC__ls
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#undef A__NAME_PC__ge
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#undef A__NAME_PC__lt
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#undef A__NAME_PC__gt
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#undef A__NAME_PC__le
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#undef A__NAME__general
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#undef A__NAME_PC
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#undef A__NAME
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#define A__NAME__general arm_instr_store_w1_word_u0_p1_reg__general
293
#define A__NAME arm_instr_store_w1_word_u0_p1_reg
294
#define A__NAME__eq arm_instr_store_w1_word_u0_p1_reg__eq
295
#define A__NAME__ne arm_instr_store_w1_word_u0_p1_reg__ne
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#define A__NAME__cs arm_instr_store_w1_word_u0_p1_reg__cs
297
#define A__NAME__cc arm_instr_store_w1_word_u0_p1_reg__cc
298
#define A__NAME__mi arm_instr_store_w1_word_u0_p1_reg__mi
299
#define A__NAME__pl arm_instr_store_w1_word_u0_p1_reg__pl
300
#define A__NAME__vs arm_instr_store_w1_word_u0_p1_reg__vs
301
#define A__NAME__vc arm_instr_store_w1_word_u0_p1_reg__vc
302
#define A__NAME__hi arm_instr_store_w1_word_u0_p1_reg__hi
303
#define A__NAME__ls arm_instr_store_w1_word_u0_p1_reg__ls
304
#define A__NAME__ge arm_instr_store_w1_word_u0_p1_reg__ge
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#define A__NAME__lt arm_instr_store_w1_word_u0_p1_reg__lt
306
#define A__NAME__gt arm_instr_store_w1_word_u0_p1_reg__gt
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#define A__NAME__le arm_instr_store_w1_word_u0_p1_reg__le
308
#define A__NAME_PC arm_instr_store_w1_word_u0_p1_reg_pc
309
#define A__NAME_PC__eq arm_instr_store_w1_word_u0_p1_reg_pc__eq
310
#define A__NAME_PC__ne arm_instr_store_w1_word_u0_p1_reg_pc__ne
311
#define A__NAME_PC__cs arm_instr_store_w1_word_u0_p1_reg_pc__cs
312
#define A__NAME_PC__cc arm_instr_store_w1_word_u0_p1_reg_pc__cc
313
#define A__NAME_PC__mi arm_instr_store_w1_word_u0_p1_reg_pc__mi
314
#define A__NAME_PC__pl arm_instr_store_w1_word_u0_p1_reg_pc__pl
315
#define A__NAME_PC__vs arm_instr_store_w1_word_u0_p1_reg_pc__vs
316
#define A__NAME_PC__vc arm_instr_store_w1_word_u0_p1_reg_pc__vc
317
#define A__NAME_PC__hi arm_instr_store_w1_word_u0_p1_reg_pc__hi
318
#define A__NAME_PC__ls arm_instr_store_w1_word_u0_p1_reg_pc__ls
319
#define A__NAME_PC__ge arm_instr_store_w1_word_u0_p1_reg_pc__ge
320
#define A__NAME_PC__lt arm_instr_store_w1_word_u0_p1_reg_pc__lt
321
#define A__NAME_PC__gt arm_instr_store_w1_word_u0_p1_reg_pc__gt
322
#define A__NAME_PC__le arm_instr_store_w1_word_u0_p1_reg_pc__le
323
#define A__W
324
#define A__P
325
#define A__REG
326
#include "
cpu_arm_instr_loadstore.cc
"
327
#undef A__W
328
#undef A__P
329
#undef A__REG
330
#undef A__NAME__eq
331
#undef A__NAME__ne
332
#undef A__NAME__cs
333
#undef A__NAME__cc
334
#undef A__NAME__mi
335
#undef A__NAME__pl
336
#undef A__NAME__vs
337
#undef A__NAME__vc
338
#undef A__NAME__hi
339
#undef A__NAME__ls
340
#undef A__NAME__ge
341
#undef A__NAME__lt
342
#undef A__NAME__gt
343
#undef A__NAME__le
344
#undef A__NAME_PC__eq
345
#undef A__NAME_PC__ne
346
#undef A__NAME_PC__cs
347
#undef A__NAME_PC__cc
348
#undef A__NAME_PC__mi
349
#undef A__NAME_PC__pl
350
#undef A__NAME_PC__vs
351
#undef A__NAME_PC__vc
352
#undef A__NAME_PC__hi
353
#undef A__NAME_PC__ls
354
#undef A__NAME_PC__ge
355
#undef A__NAME_PC__lt
356
#undef A__NAME_PC__gt
357
#undef A__NAME_PC__le
358
#undef A__NAME__general
359
#undef A__NAME_PC
360
#undef A__NAME
361
#define A__NAME__general arm_instr_load_w1_word_u0_p1_reg__general
362
#define A__NAME arm_instr_load_w1_word_u0_p1_reg
363
#define A__NAME__eq arm_instr_load_w1_word_u0_p1_reg__eq
364
#define A__NAME__ne arm_instr_load_w1_word_u0_p1_reg__ne
365
#define A__NAME__cs arm_instr_load_w1_word_u0_p1_reg__cs
366
#define A__NAME__cc arm_instr_load_w1_word_u0_p1_reg__cc
367
#define A__NAME__mi arm_instr_load_w1_word_u0_p1_reg__mi
368
#define A__NAME__pl arm_instr_load_w1_word_u0_p1_reg__pl
369
#define A__NAME__vs arm_instr_load_w1_word_u0_p1_reg__vs
370
#define A__NAME__vc arm_instr_load_w1_word_u0_p1_reg__vc
371
#define A__NAME__hi arm_instr_load_w1_word_u0_p1_reg__hi
372
#define A__NAME__ls arm_instr_load_w1_word_u0_p1_reg__ls
373
#define A__NAME__ge arm_instr_load_w1_word_u0_p1_reg__ge
374
#define A__NAME__lt arm_instr_load_w1_word_u0_p1_reg__lt
375
#define A__NAME__gt arm_instr_load_w1_word_u0_p1_reg__gt
376
#define A__NAME__le arm_instr_load_w1_word_u0_p1_reg__le
377
#define A__NAME_PC arm_instr_load_w1_word_u0_p1_reg_pc
378
#define A__NAME_PC__eq arm_instr_load_w1_word_u0_p1_reg_pc__eq
379
#define A__NAME_PC__ne arm_instr_load_w1_word_u0_p1_reg_pc__ne
380
#define A__NAME_PC__cs arm_instr_load_w1_word_u0_p1_reg_pc__cs
381
#define A__NAME_PC__cc arm_instr_load_w1_word_u0_p1_reg_pc__cc
382
#define A__NAME_PC__mi arm_instr_load_w1_word_u0_p1_reg_pc__mi
383
#define A__NAME_PC__pl arm_instr_load_w1_word_u0_p1_reg_pc__pl
384
#define A__NAME_PC__vs arm_instr_load_w1_word_u0_p1_reg_pc__vs
385
#define A__NAME_PC__vc arm_instr_load_w1_word_u0_p1_reg_pc__vc
386
#define A__NAME_PC__hi arm_instr_load_w1_word_u0_p1_reg_pc__hi
387
#define A__NAME_PC__ls arm_instr_load_w1_word_u0_p1_reg_pc__ls
388
#define A__NAME_PC__ge arm_instr_load_w1_word_u0_p1_reg_pc__ge
389
#define A__NAME_PC__lt arm_instr_load_w1_word_u0_p1_reg_pc__lt
390
#define A__NAME_PC__gt arm_instr_load_w1_word_u0_p1_reg_pc__gt
391
#define A__NAME_PC__le arm_instr_load_w1_word_u0_p1_reg_pc__le
392
#define A__L
393
#define A__W
394
#define A__P
395
#define A__REG
396
#include "
cpu_arm_instr_loadstore.cc
"
397
#undef A__L
398
#undef A__W
399
#undef A__P
400
#undef A__REG
401
#undef A__NAME__eq
402
#undef A__NAME__ne
403
#undef A__NAME__cs
404
#undef A__NAME__cc
405
#undef A__NAME__mi
406
#undef A__NAME__pl
407
#undef A__NAME__vs
408
#undef A__NAME__vc
409
#undef A__NAME__hi
410
#undef A__NAME__ls
411
#undef A__NAME__ge
412
#undef A__NAME__lt
413
#undef A__NAME__gt
414
#undef A__NAME__le
415
#undef A__NAME_PC__eq
416
#undef A__NAME_PC__ne
417
#undef A__NAME_PC__cs
418
#undef A__NAME_PC__cc
419
#undef A__NAME_PC__mi
420
#undef A__NAME_PC__pl
421
#undef A__NAME_PC__vs
422
#undef A__NAME_PC__vc
423
#undef A__NAME_PC__hi
424
#undef A__NAME_PC__ls
425
#undef A__NAME_PC__ge
426
#undef A__NAME_PC__lt
427
#undef A__NAME_PC__gt
428
#undef A__NAME_PC__le
429
#undef A__NAME__general
430
#undef A__NAME_PC
431
#undef A__NAME
432
#define A__NAME__general arm_instr_store_w1_byte_u0_p1_reg__general
433
#define A__NAME arm_instr_store_w1_byte_u0_p1_reg
434
#define A__NAME__eq arm_instr_store_w1_byte_u0_p1_reg__eq
435
#define A__NAME__ne arm_instr_store_w1_byte_u0_p1_reg__ne
436
#define A__NAME__cs arm_instr_store_w1_byte_u0_p1_reg__cs
437
#define A__NAME__cc arm_instr_store_w1_byte_u0_p1_reg__cc
438
#define A__NAME__mi arm_instr_store_w1_byte_u0_p1_reg__mi
439
#define A__NAME__pl arm_instr_store_w1_byte_u0_p1_reg__pl
440
#define A__NAME__vs arm_instr_store_w1_byte_u0_p1_reg__vs
441
#define A__NAME__vc arm_instr_store_w1_byte_u0_p1_reg__vc
442
#define A__NAME__hi arm_instr_store_w1_byte_u0_p1_reg__hi
443
#define A__NAME__ls arm_instr_store_w1_byte_u0_p1_reg__ls
444
#define A__NAME__ge arm_instr_store_w1_byte_u0_p1_reg__ge
445
#define A__NAME__lt arm_instr_store_w1_byte_u0_p1_reg__lt
446
#define A__NAME__gt arm_instr_store_w1_byte_u0_p1_reg__gt
447
#define A__NAME__le arm_instr_store_w1_byte_u0_p1_reg__le
448
#define A__NAME_PC arm_instr_store_w1_byte_u0_p1_reg_pc
449
#define A__NAME_PC__eq arm_instr_store_w1_byte_u0_p1_reg_pc__eq
450
#define A__NAME_PC__ne arm_instr_store_w1_byte_u0_p1_reg_pc__ne
451
#define A__NAME_PC__cs arm_instr_store_w1_byte_u0_p1_reg_pc__cs
452
#define A__NAME_PC__cc arm_instr_store_w1_byte_u0_p1_reg_pc__cc
453
#define A__NAME_PC__mi arm_instr_store_w1_byte_u0_p1_reg_pc__mi
454
#define A__NAME_PC__pl arm_instr_store_w1_byte_u0_p1_reg_pc__pl
455
#define A__NAME_PC__vs arm_instr_store_w1_byte_u0_p1_reg_pc__vs
456
#define A__NAME_PC__vc arm_instr_store_w1_byte_u0_p1_reg_pc__vc
457
#define A__NAME_PC__hi arm_instr_store_w1_byte_u0_p1_reg_pc__hi
458
#define A__NAME_PC__ls arm_instr_store_w1_byte_u0_p1_reg_pc__ls
459
#define A__NAME_PC__ge arm_instr_store_w1_byte_u0_p1_reg_pc__ge
460
#define A__NAME_PC__lt arm_instr_store_w1_byte_u0_p1_reg_pc__lt
461
#define A__NAME_PC__gt arm_instr_store_w1_byte_u0_p1_reg_pc__gt
462
#define A__NAME_PC__le arm_instr_store_w1_byte_u0_p1_reg_pc__le
463
#define A__W
464
#define A__B
465
#define A__P
466
#define A__REG
467
#include "
cpu_arm_instr_loadstore.cc
"
468
#undef A__W
469
#undef A__B
470
#undef A__P
471
#undef A__REG
472
#undef A__NAME__eq
473
#undef A__NAME__ne
474
#undef A__NAME__cs
475
#undef A__NAME__cc
476
#undef A__NAME__mi
477
#undef A__NAME__pl
478
#undef A__NAME__vs
479
#undef A__NAME__vc
480
#undef A__NAME__hi
481
#undef A__NAME__ls
482
#undef A__NAME__ge
483
#undef A__NAME__lt
484
#undef A__NAME__gt
485
#undef A__NAME__le
486
#undef A__NAME_PC__eq
487
#undef A__NAME_PC__ne
488
#undef A__NAME_PC__cs
489
#undef A__NAME_PC__cc
490
#undef A__NAME_PC__mi
491
#undef A__NAME_PC__pl
492
#undef A__NAME_PC__vs
493
#undef A__NAME_PC__vc
494
#undef A__NAME_PC__hi
495
#undef A__NAME_PC__ls
496
#undef A__NAME_PC__ge
497
#undef A__NAME_PC__lt
498
#undef A__NAME_PC__gt
499
#undef A__NAME_PC__le
500
#undef A__NAME__general
501
#undef A__NAME_PC
502
#undef A__NAME
503
#define A__NAME__general arm_instr_load_w1_byte_u0_p1_reg__general
504
#define A__NAME arm_instr_load_w1_byte_u0_p1_reg
505
#define A__NAME__eq arm_instr_load_w1_byte_u0_p1_reg__eq
506
#define A__NAME__ne arm_instr_load_w1_byte_u0_p1_reg__ne
507
#define A__NAME__cs arm_instr_load_w1_byte_u0_p1_reg__cs
508
#define A__NAME__cc arm_instr_load_w1_byte_u0_p1_reg__cc
509
#define A__NAME__mi arm_instr_load_w1_byte_u0_p1_reg__mi
510
#define A__NAME__pl arm_instr_load_w1_byte_u0_p1_reg__pl
511
#define A__NAME__vs arm_instr_load_w1_byte_u0_p1_reg__vs
512
#define A__NAME__vc arm_instr_load_w1_byte_u0_p1_reg__vc
513
#define A__NAME__hi arm_instr_load_w1_byte_u0_p1_reg__hi
514
#define A__NAME__ls arm_instr_load_w1_byte_u0_p1_reg__ls
515
#define A__NAME__ge arm_instr_load_w1_byte_u0_p1_reg__ge
516
#define A__NAME__lt arm_instr_load_w1_byte_u0_p1_reg__lt
517
#define A__NAME__gt arm_instr_load_w1_byte_u0_p1_reg__gt
518
#define A__NAME__le arm_instr_load_w1_byte_u0_p1_reg__le
519
#define A__NAME_PC arm_instr_load_w1_byte_u0_p1_reg_pc
520
#define A__NAME_PC__eq arm_instr_load_w1_byte_u0_p1_reg_pc__eq
521
#define A__NAME_PC__ne arm_instr_load_w1_byte_u0_p1_reg_pc__ne
522
#define A__NAME_PC__cs arm_instr_load_w1_byte_u0_p1_reg_pc__cs
523
#define A__NAME_PC__cc arm_instr_load_w1_byte_u0_p1_reg_pc__cc
524
#define A__NAME_PC__mi arm_instr_load_w1_byte_u0_p1_reg_pc__mi
525
#define A__NAME_PC__pl arm_instr_load_w1_byte_u0_p1_reg_pc__pl
526
#define A__NAME_PC__vs arm_instr_load_w1_byte_u0_p1_reg_pc__vs
527
#define A__NAME_PC__vc arm_instr_load_w1_byte_u0_p1_reg_pc__vc
528
#define A__NAME_PC__hi arm_instr_load_w1_byte_u0_p1_reg_pc__hi
529
#define A__NAME_PC__ls arm_instr_load_w1_byte_u0_p1_reg_pc__ls
530
#define A__NAME_PC__ge arm_instr_load_w1_byte_u0_p1_reg_pc__ge
531
#define A__NAME_PC__lt arm_instr_load_w1_byte_u0_p1_reg_pc__lt
532
#define A__NAME_PC__gt arm_instr_load_w1_byte_u0_p1_reg_pc__gt
533
#define A__NAME_PC__le arm_instr_load_w1_byte_u0_p1_reg_pc__le
534
#define A__L
535
#define A__W
536
#define A__B
537
#define A__P
538
#define A__REG
539
#include "
cpu_arm_instr_loadstore.cc
"
540
#undef A__L
541
#undef A__W
542
#undef A__B
543
#undef A__P
544
#undef A__REG
545
#undef A__NAME__eq
546
#undef A__NAME__ne
547
#undef A__NAME__cs
548
#undef A__NAME__cc
549
#undef A__NAME__mi
550
#undef A__NAME__pl
551
#undef A__NAME__vs
552
#undef A__NAME__vc
553
#undef A__NAME__hi
554
#undef A__NAME__ls
555
#undef A__NAME__ge
556
#undef A__NAME__lt
557
#undef A__NAME__gt
558
#undef A__NAME__le
559
#undef A__NAME_PC__eq
560
#undef A__NAME_PC__ne
561
#undef A__NAME_PC__cs
562
#undef A__NAME_PC__cc
563
#undef A__NAME_PC__mi
564
#undef A__NAME_PC__pl
565
#undef A__NAME_PC__vs
566
#undef A__NAME_PC__vc
567
#undef A__NAME_PC__hi
568
#undef A__NAME_PC__ls
569
#undef A__NAME_PC__ge
570
#undef A__NAME_PC__lt
571
#undef A__NAME_PC__gt
572
#undef A__NAME_PC__le
573
#undef A__NAME__general
574
#undef A__NAME_PC
575
#undef A__NAME
576
#define A__NAME__general arm_instr_store_w1_signed_byte_u0_p1_imm__general
577
#define A__NAME arm_instr_store_w1_signed_byte_u0_p1_imm
578
#define A__NAME__eq arm_instr_store_w1_signed_byte_u0_p1_imm__eq
579
#define A__NAME__ne arm_instr_store_w1_signed_byte_u0_p1_imm__ne
580
#define A__NAME__cs arm_instr_store_w1_signed_byte_u0_p1_imm__cs
581
#define A__NAME__cc arm_instr_store_w1_signed_byte_u0_p1_imm__cc
582
#define A__NAME__mi arm_instr_store_w1_signed_byte_u0_p1_imm__mi
583
#define A__NAME__pl arm_instr_store_w1_signed_byte_u0_p1_imm__pl
584
#define A__NAME__vs arm_instr_store_w1_signed_byte_u0_p1_imm__vs
585
#define A__NAME__vc arm_instr_store_w1_signed_byte_u0_p1_imm__vc
586
#define A__NAME__hi arm_instr_store_w1_signed_byte_u0_p1_imm__hi
587
#define A__NAME__ls arm_instr_store_w1_signed_byte_u0_p1_imm__ls
588
#define A__NAME__ge arm_instr_store_w1_signed_byte_u0_p1_imm__ge
589
#define A__NAME__lt arm_instr_store_w1_signed_byte_u0_p1_imm__lt
590
#define A__NAME__gt arm_instr_store_w1_signed_byte_u0_p1_imm__gt
591
#define A__NAME__le arm_instr_store_w1_signed_byte_u0_p1_imm__le
592
#define A__NAME_PC arm_instr_store_w1_signed_byte_u0_p1_imm_pc
593
#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u0_p1_imm_pc__eq
594
#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ne
595
#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cs
596
#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u0_p1_imm_pc__cc
597
#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u0_p1_imm_pc__mi
598
#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u0_p1_imm_pc__pl
599
#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vs
600
#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u0_p1_imm_pc__vc
601
#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u0_p1_imm_pc__hi
602
#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ls
603
#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u0_p1_imm_pc__ge
604
#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u0_p1_imm_pc__lt
605
#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u0_p1_imm_pc__gt
606
#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u0_p1_imm_pc__le
607
#define A__SIGNED
608
#define A__W
609
#define A__B
610
#define A__P
611
#include "
cpu_arm_instr_loadstore.cc
"
612
#undef A__SIGNED
613
#undef A__W
614
#undef A__B
615
#undef A__P
616
#undef A__NAME__eq
617
#undef A__NAME__ne
618
#undef A__NAME__cs
619
#undef A__NAME__cc
620
#undef A__NAME__mi
621
#undef A__NAME__pl
622
#undef A__NAME__vs
623
#undef A__NAME__vc
624
#undef A__NAME__hi
625
#undef A__NAME__ls
626
#undef A__NAME__ge
627
#undef A__NAME__lt
628
#undef A__NAME__gt
629
#undef A__NAME__le
630
#undef A__NAME_PC__eq
631
#undef A__NAME_PC__ne
632
#undef A__NAME_PC__cs
633
#undef A__NAME_PC__cc
634
#undef A__NAME_PC__mi
635
#undef A__NAME_PC__pl
636
#undef A__NAME_PC__vs
637
#undef A__NAME_PC__vc
638
#undef A__NAME_PC__hi
639
#undef A__NAME_PC__ls
640
#undef A__NAME_PC__ge
641
#undef A__NAME_PC__lt
642
#undef A__NAME_PC__gt
643
#undef A__NAME_PC__le
644
#undef A__NAME__general
645
#undef A__NAME_PC
646
#undef A__NAME
647
#define A__NAME__general arm_instr_load_w1_signed_byte_u0_p1_imm__general
648
#define A__NAME arm_instr_load_w1_signed_byte_u0_p1_imm
649
#define A__NAME__eq arm_instr_load_w1_signed_byte_u0_p1_imm__eq
650
#define A__NAME__ne arm_instr_load_w1_signed_byte_u0_p1_imm__ne
651
#define A__NAME__cs arm_instr_load_w1_signed_byte_u0_p1_imm__cs
652
#define A__NAME__cc arm_instr_load_w1_signed_byte_u0_p1_imm__cc
653
#define A__NAME__mi arm_instr_load_w1_signed_byte_u0_p1_imm__mi
654
#define A__NAME__pl arm_instr_load_w1_signed_byte_u0_p1_imm__pl
655
#define A__NAME__vs arm_instr_load_w1_signed_byte_u0_p1_imm__vs
656
#define A__NAME__vc arm_instr_load_w1_signed_byte_u0_p1_imm__vc
657
#define A__NAME__hi arm_instr_load_w1_signed_byte_u0_p1_imm__hi
658
#define A__NAME__ls arm_instr_load_w1_signed_byte_u0_p1_imm__ls
659
#define A__NAME__ge arm_instr_load_w1_signed_byte_u0_p1_imm__ge
660
#define A__NAME__lt arm_instr_load_w1_signed_byte_u0_p1_imm__lt
661
#define A__NAME__gt arm_instr_load_w1_signed_byte_u0_p1_imm__gt
662
#define A__NAME__le arm_instr_load_w1_signed_byte_u0_p1_imm__le
663
#define A__NAME_PC arm_instr_load_w1_signed_byte_u0_p1_imm_pc
664
#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u0_p1_imm_pc__eq
665
#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ne
666
#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cs
667
#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u0_p1_imm_pc__cc
668
#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u0_p1_imm_pc__mi
669
#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u0_p1_imm_pc__pl
670
#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vs
671
#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u0_p1_imm_pc__vc
672
#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u0_p1_imm_pc__hi
673
#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ls
674
#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u0_p1_imm_pc__ge
675
#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u0_p1_imm_pc__lt
676
#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u0_p1_imm_pc__gt
677
#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u0_p1_imm_pc__le
678
#define A__SIGNED
679
#define A__L
680
#define A__W
681
#define A__B
682
#define A__P
683
#include "
cpu_arm_instr_loadstore.cc
"
684
#undef A__SIGNED
685
#undef A__L
686
#undef A__W
687
#undef A__B
688
#undef A__P
689
#undef A__NAME__eq
690
#undef A__NAME__ne
691
#undef A__NAME__cs
692
#undef A__NAME__cc
693
#undef A__NAME__mi
694
#undef A__NAME__pl
695
#undef A__NAME__vs
696
#undef A__NAME__vc
697
#undef A__NAME__hi
698
#undef A__NAME__ls
699
#undef A__NAME__ge
700
#undef A__NAME__lt
701
#undef A__NAME__gt
702
#undef A__NAME__le
703
#undef A__NAME_PC__eq
704
#undef A__NAME_PC__ne
705
#undef A__NAME_PC__cs
706
#undef A__NAME_PC__cc
707
#undef A__NAME_PC__mi
708
#undef A__NAME_PC__pl
709
#undef A__NAME_PC__vs
710
#undef A__NAME_PC__vc
711
#undef A__NAME_PC__hi
712
#undef A__NAME_PC__ls
713
#undef A__NAME_PC__ge
714
#undef A__NAME_PC__lt
715
#undef A__NAME_PC__gt
716
#undef A__NAME_PC__le
717
#undef A__NAME__general
718
#undef A__NAME_PC
719
#undef A__NAME
720
#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u0_p1_imm__general
721
#define A__NAME arm_instr_store_w1_unsigned_halfword_u0_p1_imm
722
#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u0_p1_imm__eq
723
#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ne
724
#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cs
725
#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u0_p1_imm__cc
726
#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u0_p1_imm__mi
727
#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u0_p1_imm__pl
728
#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vs
729
#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u0_p1_imm__vc
730
#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u0_p1_imm__hi
731
#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ls
732
#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u0_p1_imm__ge
733
#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u0_p1_imm__lt
734
#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u0_p1_imm__gt
735
#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u0_p1_imm__le
736
#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc
737
#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__eq
738
#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ne
739
#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cs
740
#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__cc
741
#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__mi
742
#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__pl
743
#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vs
744
#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__vc
745
#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__hi
746
#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ls
747
#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__ge
748
#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__lt
749
#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__gt
750
#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u0_p1_imm_pc__le
751
#define A__W
752
#define A__H
753
#define A__P
754
#include "
cpu_arm_instr_loadstore.cc
"
755
#undef A__W
756
#undef A__H
757
#undef A__P
758
#undef A__NAME__eq
759
#undef A__NAME__ne
760
#undef A__NAME__cs
761
#undef A__NAME__cc
762
#undef A__NAME__mi
763
#undef A__NAME__pl
764
#undef A__NAME__vs
765
#undef A__NAME__vc
766
#undef A__NAME__hi
767
#undef A__NAME__ls
768
#undef A__NAME__ge
769
#undef A__NAME__lt
770
#undef A__NAME__gt
771
#undef A__NAME__le
772
#undef A__NAME_PC__eq
773
#undef A__NAME_PC__ne
774
#undef A__NAME_PC__cs
775
#undef A__NAME_PC__cc
776
#undef A__NAME_PC__mi
777
#undef A__NAME_PC__pl
778
#undef A__NAME_PC__vs
779
#undef A__NAME_PC__vc
780
#undef A__NAME_PC__hi
781
#undef A__NAME_PC__ls
782
#undef A__NAME_PC__ge
783
#undef A__NAME_PC__lt
784
#undef A__NAME_PC__gt
785
#undef A__NAME_PC__le
786
#undef A__NAME__general
787
#undef A__NAME_PC
788
#undef A__NAME
789
#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u0_p1_imm__general
790
#define A__NAME arm_instr_load_w1_unsigned_halfword_u0_p1_imm
791
#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u0_p1_imm__eq
792
#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ne
793
#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cs
794
#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u0_p1_imm__cc
795
#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u0_p1_imm__mi
796
#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u0_p1_imm__pl
797
#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vs
798
#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u0_p1_imm__vc
799
#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u0_p1_imm__hi
800
#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ls
801
#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u0_p1_imm__ge
802
#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u0_p1_imm__lt
803
#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u0_p1_imm__gt
804
#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u0_p1_imm__le
805
#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc
806
#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__eq
807
#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ne
808
#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cs
809
#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__cc
810
#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__mi
811
#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__pl
812
#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vs
813
#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__vc
814
#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__hi
815
#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ls
816
#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__ge
817
#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__lt
818
#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__gt
819
#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u0_p1_imm_pc__le
820
#define A__L
821
#define A__W
822
#define A__H
823
#define A__P
824
#include "
cpu_arm_instr_loadstore.cc
"
825
#undef A__L
826
#undef A__W
827
#undef A__H
828
#undef A__P
829
#undef A__NAME__eq
830
#undef A__NAME__ne
831
#undef A__NAME__cs
832
#undef A__NAME__cc
833
#undef A__NAME__mi
834
#undef A__NAME__pl
835
#undef A__NAME__vs
836
#undef A__NAME__vc
837
#undef A__NAME__hi
838
#undef A__NAME__ls
839
#undef A__NAME__ge
840
#undef A__NAME__lt
841
#undef A__NAME__gt
842
#undef A__NAME__le
843
#undef A__NAME_PC__eq
844
#undef A__NAME_PC__ne
845
#undef A__NAME_PC__cs
846
#undef A__NAME_PC__cc
847
#undef A__NAME_PC__mi
848
#undef A__NAME_PC__pl
849
#undef A__NAME_PC__vs
850
#undef A__NAME_PC__vc
851
#undef A__NAME_PC__hi
852
#undef A__NAME_PC__ls
853
#undef A__NAME_PC__ge
854
#undef A__NAME_PC__lt
855
#undef A__NAME_PC__gt
856
#undef A__NAME_PC__le
857
#undef A__NAME__general
858
#undef A__NAME_PC
859
#undef A__NAME
860
#define A__NAME__general arm_instr_store_w1_signed_halfword_u0_p1_imm__general
861
#define A__NAME arm_instr_store_w1_signed_halfword_u0_p1_imm
862
#define A__NAME__eq arm_instr_store_w1_signed_halfword_u0_p1_imm__eq
863
#define A__NAME__ne arm_instr_store_w1_signed_halfword_u0_p1_imm__ne
864
#define A__NAME__cs arm_instr_store_w1_signed_halfword_u0_p1_imm__cs
865
#define A__NAME__cc arm_instr_store_w1_signed_halfword_u0_p1_imm__cc
866
#define A__NAME__mi arm_instr_store_w1_signed_halfword_u0_p1_imm__mi
867
#define A__NAME__pl arm_instr_store_w1_signed_halfword_u0_p1_imm__pl
868
#define A__NAME__vs arm_instr_store_w1_signed_halfword_u0_p1_imm__vs
869
#define A__NAME__vc arm_instr_store_w1_signed_halfword_u0_p1_imm__vc
870
#define A__NAME__hi arm_instr_store_w1_signed_halfword_u0_p1_imm__hi
871
#define A__NAME__ls arm_instr_store_w1_signed_halfword_u0_p1_imm__ls
872
#define A__NAME__ge arm_instr_store_w1_signed_halfword_u0_p1_imm__ge
873
#define A__NAME__lt arm_instr_store_w1_signed_halfword_u0_p1_imm__lt
874
#define A__NAME__gt arm_instr_store_w1_signed_halfword_u0_p1_imm__gt
875
#define A__NAME__le arm_instr_store_w1_signed_halfword_u0_p1_imm__le
876
#define A__NAME_PC arm_instr_store_w1_signed_halfword_u0_p1_imm_pc
877
#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__eq
878
#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ne
879
#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cs
880
#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__cc
881
#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__mi
882
#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__pl
883
#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vs
884
#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__vc
885
#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__hi
886
#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ls
887
#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__ge
888
#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__lt
889
#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__gt
890
#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u0_p1_imm_pc__le
891
#define A__SIGNED
892
#define A__W
893
#define A__H
894
#define A__P
895
#include "
cpu_arm_instr_loadstore.cc
"
896
#undef A__SIGNED
897
#undef A__W
898
#undef A__H
899
#undef A__P
900
#undef A__NAME__eq
901
#undef A__NAME__ne
902
#undef A__NAME__cs
903
#undef A__NAME__cc
904
#undef A__NAME__mi
905
#undef A__NAME__pl
906
#undef A__NAME__vs
907
#undef A__NAME__vc
908
#undef A__NAME__hi
909
#undef A__NAME__ls
910
#undef A__NAME__ge
911
#undef A__NAME__lt
912
#undef A__NAME__gt
913
#undef A__NAME__le
914
#undef A__NAME_PC__eq
915
#undef A__NAME_PC__ne
916
#undef A__NAME_PC__cs
917
#undef A__NAME_PC__cc
918
#undef A__NAME_PC__mi
919
#undef A__NAME_PC__pl
920
#undef A__NAME_PC__vs
921
#undef A__NAME_PC__vc
922
#undef A__NAME_PC__hi
923
#undef A__NAME_PC__ls
924
#undef A__NAME_PC__ge
925
#undef A__NAME_PC__lt
926
#undef A__NAME_PC__gt
927
#undef A__NAME_PC__le
928
#undef A__NAME__general
929
#undef A__NAME_PC
930
#undef A__NAME
931
#define A__NAME__general arm_instr_load_w1_signed_halfword_u0_p1_imm__general
932
#define A__NAME arm_instr_load_w1_signed_halfword_u0_p1_imm
933
#define A__NAME__eq arm_instr_load_w1_signed_halfword_u0_p1_imm__eq
934
#define A__NAME__ne arm_instr_load_w1_signed_halfword_u0_p1_imm__ne
935
#define A__NAME__cs arm_instr_load_w1_signed_halfword_u0_p1_imm__cs
936
#define A__NAME__cc arm_instr_load_w1_signed_halfword_u0_p1_imm__cc
937
#define A__NAME__mi arm_instr_load_w1_signed_halfword_u0_p1_imm__mi
938
#define A__NAME__pl arm_instr_load_w1_signed_halfword_u0_p1_imm__pl
939
#define A__NAME__vs arm_instr_load_w1_signed_halfword_u0_p1_imm__vs
940
#define A__NAME__vc arm_instr_load_w1_signed_halfword_u0_p1_imm__vc
941
#define A__NAME__hi arm_instr_load_w1_signed_halfword_u0_p1_imm__hi
942
#define A__NAME__ls arm_instr_load_w1_signed_halfword_u0_p1_imm__ls
943
#define A__NAME__ge arm_instr_load_w1_signed_halfword_u0_p1_imm__ge
944
#define A__NAME__lt arm_instr_load_w1_signed_halfword_u0_p1_imm__lt
945
#define A__NAME__gt arm_instr_load_w1_signed_halfword_u0_p1_imm__gt
946
#define A__NAME__le arm_instr_load_w1_signed_halfword_u0_p1_imm__le
947
#define A__NAME_PC arm_instr_load_w1_signed_halfword_u0_p1_imm_pc
948
#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__eq
949
#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ne
950
#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cs
951
#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__cc
952
#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__mi
953
#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__pl
954
#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vs
955
#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__vc
956
#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__hi
957
#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ls
958
#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__ge
959
#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__lt
960
#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__gt
961
#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u0_p1_imm_pc__le
962
#define A__SIGNED
963
#define A__L
964
#define A__W
965
#define A__H
966
#define A__P
967
#include "
cpu_arm_instr_loadstore.cc
"
968
#undef A__SIGNED
969
#undef A__L
970
#undef A__W
971
#undef A__H
972
#undef A__P
973
#undef A__NAME__eq
974
#undef A__NAME__ne
975
#undef A__NAME__cs
976
#undef A__NAME__cc
977
#undef A__NAME__mi
978
#undef A__NAME__pl
979
#undef A__NAME__vs
980
#undef A__NAME__vc
981
#undef A__NAME__hi
982
#undef A__NAME__ls
983
#undef A__NAME__ge
984
#undef A__NAME__lt
985
#undef A__NAME__gt
986
#undef A__NAME__le
987
#undef A__NAME_PC__eq
988
#undef A__NAME_PC__ne
989
#undef A__NAME_PC__cs
990
#undef A__NAME_PC__cc
991
#undef A__NAME_PC__mi
992
#undef A__NAME_PC__pl
993
#undef A__NAME_PC__vs
994
#undef A__NAME_PC__vc
995
#undef A__NAME_PC__hi
996
#undef A__NAME_PC__ls
997
#undef A__NAME_PC__ge
998
#undef A__NAME_PC__lt
999
#undef A__NAME_PC__gt
1000
#undef A__NAME_PC__le
1001
#undef A__NAME__general
1002
#undef A__NAME_PC
1003
#undef A__NAME
1004
#define A__NAME__general arm_instr_store_w1_signed_byte_u0_p1_reg__general
1005
#define A__NAME arm_instr_store_w1_signed_byte_u0_p1_reg
1006
#define A__NAME__eq arm_instr_store_w1_signed_byte_u0_p1_reg__eq
1007
#define A__NAME__ne arm_instr_store_w1_signed_byte_u0_p1_reg__ne
1008
#define A__NAME__cs arm_instr_store_w1_signed_byte_u0_p1_reg__cs
1009
#define A__NAME__cc arm_instr_store_w1_signed_byte_u0_p1_reg__cc
1010
#define A__NAME__mi arm_instr_store_w1_signed_byte_u0_p1_reg__mi
1011
#define A__NAME__pl arm_instr_store_w1_signed_byte_u0_p1_reg__pl
1012
#define A__NAME__vs arm_instr_store_w1_signed_byte_u0_p1_reg__vs
1013
#define A__NAME__vc arm_instr_store_w1_signed_byte_u0_p1_reg__vc
1014
#define A__NAME__hi arm_instr_store_w1_signed_byte_u0_p1_reg__hi
1015
#define A__NAME__ls arm_instr_store_w1_signed_byte_u0_p1_reg__ls
1016
#define A__NAME__ge arm_instr_store_w1_signed_byte_u0_p1_reg__ge
1017
#define A__NAME__lt arm_instr_store_w1_signed_byte_u0_p1_reg__lt
1018
#define A__NAME__gt arm_instr_store_w1_signed_byte_u0_p1_reg__gt
1019
#define A__NAME__le arm_instr_store_w1_signed_byte_u0_p1_reg__le
1020
#define A__NAME_PC arm_instr_store_w1_signed_byte_u0_p1_reg_pc
1021
#define A__NAME_PC__eq arm_instr_store_w1_signed_byte_u0_p1_reg_pc__eq
1022
#define A__NAME_PC__ne arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ne
1023
#define A__NAME_PC__cs arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cs
1024
#define A__NAME_PC__cc arm_instr_store_w1_signed_byte_u0_p1_reg_pc__cc
1025
#define A__NAME_PC__mi arm_instr_store_w1_signed_byte_u0_p1_reg_pc__mi
1026
#define A__NAME_PC__pl arm_instr_store_w1_signed_byte_u0_p1_reg_pc__pl
1027
#define A__NAME_PC__vs arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vs
1028
#define A__NAME_PC__vc arm_instr_store_w1_signed_byte_u0_p1_reg_pc__vc
1029
#define A__NAME_PC__hi arm_instr_store_w1_signed_byte_u0_p1_reg_pc__hi
1030
#define A__NAME_PC__ls arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ls
1031
#define A__NAME_PC__ge arm_instr_store_w1_signed_byte_u0_p1_reg_pc__ge
1032
#define A__NAME_PC__lt arm_instr_store_w1_signed_byte_u0_p1_reg_pc__lt
1033
#define A__NAME_PC__gt arm_instr_store_w1_signed_byte_u0_p1_reg_pc__gt
1034
#define A__NAME_PC__le arm_instr_store_w1_signed_byte_u0_p1_reg_pc__le
1035
#define A__SIGNED
1036
#define A__W
1037
#define A__B
1038
#define A__P
1039
#define A__REG
1040
#include "
cpu_arm_instr_loadstore.cc
"
1041
#undef A__SIGNED
1042
#undef A__W
1043
#undef A__B
1044
#undef A__P
1045
#undef A__REG
1046
#undef A__NAME__eq
1047
#undef A__NAME__ne
1048
#undef A__NAME__cs
1049
#undef A__NAME__cc
1050
#undef A__NAME__mi
1051
#undef A__NAME__pl
1052
#undef A__NAME__vs
1053
#undef A__NAME__vc
1054
#undef A__NAME__hi
1055
#undef A__NAME__ls
1056
#undef A__NAME__ge
1057
#undef A__NAME__lt
1058
#undef A__NAME__gt
1059
#undef A__NAME__le
1060
#undef A__NAME_PC__eq
1061
#undef A__NAME_PC__ne
1062
#undef A__NAME_PC__cs
1063
#undef A__NAME_PC__cc
1064
#undef A__NAME_PC__mi
1065
#undef A__NAME_PC__pl
1066
#undef A__NAME_PC__vs
1067
#undef A__NAME_PC__vc
1068
#undef A__NAME_PC__hi
1069
#undef A__NAME_PC__ls
1070
#undef A__NAME_PC__ge
1071
#undef A__NAME_PC__lt
1072
#undef A__NAME_PC__gt
1073
#undef A__NAME_PC__le
1074
#undef A__NAME__general
1075
#undef A__NAME_PC
1076
#undef A__NAME
1077
#define A__NAME__general arm_instr_load_w1_signed_byte_u0_p1_reg__general
1078
#define A__NAME arm_instr_load_w1_signed_byte_u0_p1_reg
1079
#define A__NAME__eq arm_instr_load_w1_signed_byte_u0_p1_reg__eq
1080
#define A__NAME__ne arm_instr_load_w1_signed_byte_u0_p1_reg__ne
1081
#define A__NAME__cs arm_instr_load_w1_signed_byte_u0_p1_reg__cs
1082
#define A__NAME__cc arm_instr_load_w1_signed_byte_u0_p1_reg__cc
1083
#define A__NAME__mi arm_instr_load_w1_signed_byte_u0_p1_reg__mi
1084
#define A__NAME__pl arm_instr_load_w1_signed_byte_u0_p1_reg__pl
1085
#define A__NAME__vs arm_instr_load_w1_signed_byte_u0_p1_reg__vs
1086
#define A__NAME__vc arm_instr_load_w1_signed_byte_u0_p1_reg__vc
1087
#define A__NAME__hi arm_instr_load_w1_signed_byte_u0_p1_reg__hi
1088
#define A__NAME__ls arm_instr_load_w1_signed_byte_u0_p1_reg__ls
1089
#define A__NAME__ge arm_instr_load_w1_signed_byte_u0_p1_reg__ge
1090
#define A__NAME__lt arm_instr_load_w1_signed_byte_u0_p1_reg__lt
1091
#define A__NAME__gt arm_instr_load_w1_signed_byte_u0_p1_reg__gt
1092
#define A__NAME__le arm_instr_load_w1_signed_byte_u0_p1_reg__le
1093
#define A__NAME_PC arm_instr_load_w1_signed_byte_u0_p1_reg_pc
1094
#define A__NAME_PC__eq arm_instr_load_w1_signed_byte_u0_p1_reg_pc__eq
1095
#define A__NAME_PC__ne arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ne
1096
#define A__NAME_PC__cs arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cs
1097
#define A__NAME_PC__cc arm_instr_load_w1_signed_byte_u0_p1_reg_pc__cc
1098
#define A__NAME_PC__mi arm_instr_load_w1_signed_byte_u0_p1_reg_pc__mi
1099
#define A__NAME_PC__pl arm_instr_load_w1_signed_byte_u0_p1_reg_pc__pl
1100
#define A__NAME_PC__vs arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vs
1101
#define A__NAME_PC__vc arm_instr_load_w1_signed_byte_u0_p1_reg_pc__vc
1102
#define A__NAME_PC__hi arm_instr_load_w1_signed_byte_u0_p1_reg_pc__hi
1103
#define A__NAME_PC__ls arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ls
1104
#define A__NAME_PC__ge arm_instr_load_w1_signed_byte_u0_p1_reg_pc__ge
1105
#define A__NAME_PC__lt arm_instr_load_w1_signed_byte_u0_p1_reg_pc__lt
1106
#define A__NAME_PC__gt arm_instr_load_w1_signed_byte_u0_p1_reg_pc__gt
1107
#define A__NAME_PC__le arm_instr_load_w1_signed_byte_u0_p1_reg_pc__le
1108
#define A__SIGNED
1109
#define A__L
1110
#define A__W
1111
#define A__B
1112
#define A__P
1113
#define A__REG
1114
#include "
cpu_arm_instr_loadstore.cc
"
1115
#undef A__SIGNED
1116
#undef A__L
1117
#undef A__W
1118
#undef A__B
1119
#undef A__P
1120
#undef A__REG
1121
#undef A__NAME__eq
1122
#undef A__NAME__ne
1123
#undef A__NAME__cs
1124
#undef A__NAME__cc
1125
#undef A__NAME__mi
1126
#undef A__NAME__pl
1127
#undef A__NAME__vs
1128
#undef A__NAME__vc
1129
#undef A__NAME__hi
1130
#undef A__NAME__ls
1131
#undef A__NAME__ge
1132
#undef A__NAME__lt
1133
#undef A__NAME__gt
1134
#undef A__NAME__le
1135
#undef A__NAME_PC__eq
1136
#undef A__NAME_PC__ne
1137
#undef A__NAME_PC__cs
1138
#undef A__NAME_PC__cc
1139
#undef A__NAME_PC__mi
1140
#undef A__NAME_PC__pl
1141
#undef A__NAME_PC__vs
1142
#undef A__NAME_PC__vc
1143
#undef A__NAME_PC__hi
1144
#undef A__NAME_PC__ls
1145
#undef A__NAME_PC__ge
1146
#undef A__NAME_PC__lt
1147
#undef A__NAME_PC__gt
1148
#undef A__NAME_PC__le
1149
#undef A__NAME__general
1150
#undef A__NAME_PC
1151
#undef A__NAME
1152
#define A__NAME__general arm_instr_store_w1_unsigned_halfword_u0_p1_reg__general
1153
#define A__NAME arm_instr_store_w1_unsigned_halfword_u0_p1_reg
1154
#define A__NAME__eq arm_instr_store_w1_unsigned_halfword_u0_p1_reg__eq
1155
#define A__NAME__ne arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ne
1156
#define A__NAME__cs arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cs
1157
#define A__NAME__cc arm_instr_store_w1_unsigned_halfword_u0_p1_reg__cc
1158
#define A__NAME__mi arm_instr_store_w1_unsigned_halfword_u0_p1_reg__mi
1159
#define A__NAME__pl arm_instr_store_w1_unsigned_halfword_u0_p1_reg__pl
1160
#define A__NAME__vs arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vs
1161
#define A__NAME__vc arm_instr_store_w1_unsigned_halfword_u0_p1_reg__vc
1162
#define A__NAME__hi arm_instr_store_w1_unsigned_halfword_u0_p1_reg__hi
1163
#define A__NAME__ls arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ls
1164
#define A__NAME__ge arm_instr_store_w1_unsigned_halfword_u0_p1_reg__ge
1165
#define A__NAME__lt arm_instr_store_w1_unsigned_halfword_u0_p1_reg__lt
1166
#define A__NAME__gt arm_instr_store_w1_unsigned_halfword_u0_p1_reg__gt
1167
#define A__NAME__le arm_instr_store_w1_unsigned_halfword_u0_p1_reg__le
1168
#define A__NAME_PC arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc
1169
#define A__NAME_PC__eq arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__eq
1170
#define A__NAME_PC__ne arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ne
1171
#define A__NAME_PC__cs arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cs
1172
#define A__NAME_PC__cc arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__cc
1173
#define A__NAME_PC__mi arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__mi
1174
#define A__NAME_PC__pl arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__pl
1175
#define A__NAME_PC__vs arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vs
1176
#define A__NAME_PC__vc arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__vc
1177
#define A__NAME_PC__hi arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__hi
1178
#define A__NAME_PC__ls arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ls
1179
#define A__NAME_PC__ge arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__ge
1180
#define A__NAME_PC__lt arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__lt
1181
#define A__NAME_PC__gt arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__gt
1182
#define A__NAME_PC__le arm_instr_store_w1_unsigned_halfword_u0_p1_reg_pc__le
1183
#define A__W
1184
#define A__H
1185
#define A__P
1186
#define A__REG
1187
#include "
cpu_arm_instr_loadstore.cc
"
1188
#undef A__W
1189
#undef A__H
1190
#undef A__P
1191
#undef A__REG
1192
#undef A__NAME__eq
1193
#undef A__NAME__ne
1194
#undef A__NAME__cs
1195
#undef A__NAME__cc
1196
#undef A__NAME__mi
1197
#undef A__NAME__pl
1198
#undef A__NAME__vs
1199
#undef A__NAME__vc
1200
#undef A__NAME__hi
1201
#undef A__NAME__ls
1202
#undef A__NAME__ge
1203
#undef A__NAME__lt
1204
#undef A__NAME__gt
1205
#undef A__NAME__le
1206
#undef A__NAME_PC__eq
1207
#undef A__NAME_PC__ne
1208
#undef A__NAME_PC__cs
1209
#undef A__NAME_PC__cc
1210
#undef A__NAME_PC__mi
1211
#undef A__NAME_PC__pl
1212
#undef A__NAME_PC__vs
1213
#undef A__NAME_PC__vc
1214
#undef A__NAME_PC__hi
1215
#undef A__NAME_PC__ls
1216
#undef A__NAME_PC__ge
1217
#undef A__NAME_PC__lt
1218
#undef A__NAME_PC__gt
1219
#undef A__NAME_PC__le
1220
#undef A__NAME__general
1221
#undef A__NAME_PC
1222
#undef A__NAME
1223
#define A__NAME__general arm_instr_load_w1_unsigned_halfword_u0_p1_reg__general
1224
#define A__NAME arm_instr_load_w1_unsigned_halfword_u0_p1_reg
1225
#define A__NAME__eq arm_instr_load_w1_unsigned_halfword_u0_p1_reg__eq
1226
#define A__NAME__ne arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ne
1227
#define A__NAME__cs arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cs
1228
#define A__NAME__cc arm_instr_load_w1_unsigned_halfword_u0_p1_reg__cc
1229
#define A__NAME__mi arm_instr_load_w1_unsigned_halfword_u0_p1_reg__mi
1230
#define A__NAME__pl arm_instr_load_w1_unsigned_halfword_u0_p1_reg__pl
1231
#define A__NAME__vs arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vs
1232
#define A__NAME__vc arm_instr_load_w1_unsigned_halfword_u0_p1_reg__vc
1233
#define A__NAME__hi arm_instr_load_w1_unsigned_halfword_u0_p1_reg__hi
1234
#define A__NAME__ls arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ls
1235
#define A__NAME__ge arm_instr_load_w1_unsigned_halfword_u0_p1_reg__ge
1236
#define A__NAME__lt arm_instr_load_w1_unsigned_halfword_u0_p1_reg__lt
1237
#define A__NAME__gt arm_instr_load_w1_unsigned_halfword_u0_p1_reg__gt
1238
#define A__NAME__le arm_instr_load_w1_unsigned_halfword_u0_p1_reg__le
1239
#define A__NAME_PC arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc
1240
#define A__NAME_PC__eq arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__eq
1241
#define A__NAME_PC__ne arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ne
1242
#define A__NAME_PC__cs arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cs
1243
#define A__NAME_PC__cc arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__cc
1244
#define A__NAME_PC__mi arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__mi
1245
#define A__NAME_PC__pl arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__pl
1246
#define A__NAME_PC__vs arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vs
1247
#define A__NAME_PC__vc arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__vc
1248
#define A__NAME_PC__hi arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__hi
1249
#define A__NAME_PC__ls arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ls
1250
#define A__NAME_PC__ge arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__ge
1251
#define A__NAME_PC__lt arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__lt
1252
#define A__NAME_PC__gt arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__gt
1253
#define A__NAME_PC__le arm_instr_load_w1_unsigned_halfword_u0_p1_reg_pc__le
1254
#define A__L
1255
#define A__W
1256
#define A__H
1257
#define A__P
1258
#define A__REG
1259
#include "
cpu_arm_instr_loadstore.cc
"
1260
#undef A__L
1261
#undef A__W
1262
#undef A__H
1263
#undef A__P
1264
#undef A__REG
1265
#undef A__NAME__eq
1266
#undef A__NAME__ne
1267
#undef A__NAME__cs
1268
#undef A__NAME__cc
1269
#undef A__NAME__mi
1270
#undef A__NAME__pl
1271
#undef A__NAME__vs
1272
#undef A__NAME__vc
1273
#undef A__NAME__hi
1274
#undef A__NAME__ls
1275
#undef A__NAME__ge
1276
#undef A__NAME__lt
1277
#undef A__NAME__gt
1278
#undef A__NAME__le
1279
#undef A__NAME_PC__eq
1280
#undef A__NAME_PC__ne
1281
#undef A__NAME_PC__cs
1282
#undef A__NAME_PC__cc
1283
#undef A__NAME_PC__mi
1284
#undef A__NAME_PC__pl
1285
#undef A__NAME_PC__vs
1286
#undef A__NAME_PC__vc
1287
#undef A__NAME_PC__hi
1288
#undef A__NAME_PC__ls
1289
#undef A__NAME_PC__ge
1290
#undef A__NAME_PC__lt
1291
#undef A__NAME_PC__gt
1292
#undef A__NAME_PC__le
1293
#undef A__NAME__general
1294
#undef A__NAME_PC
1295
#undef A__NAME
1296
#define A__NAME__general arm_instr_store_w1_signed_halfword_u0_p1_reg__general
1297
#define A__NAME arm_instr_store_w1_signed_halfword_u0_p1_reg
1298
#define A__NAME__eq arm_instr_store_w1_signed_halfword_u0_p1_reg__eq
1299
#define A__NAME__ne arm_instr_store_w1_signed_halfword_u0_p1_reg__ne
1300
#define A__NAME__cs arm_instr_store_w1_signed_halfword_u0_p1_reg__cs
1301
#define A__NAME__cc arm_instr_store_w1_signed_halfword_u0_p1_reg__cc
1302
#define A__NAME__mi arm_instr_store_w1_signed_halfword_u0_p1_reg__mi
1303
#define A__NAME__pl arm_instr_store_w1_signed_halfword_u0_p1_reg__pl
1304
#define A__NAME__vs arm_instr_store_w1_signed_halfword_u0_p1_reg__vs
1305
#define A__NAME__vc arm_instr_store_w1_signed_halfword_u0_p1_reg__vc
1306
#define A__NAME__hi arm_instr_store_w1_signed_halfword_u0_p1_reg__hi
1307
#define A__NAME__ls arm_instr_store_w1_signed_halfword_u0_p1_reg__ls
1308
#define A__NAME__ge arm_instr_store_w1_signed_halfword_u0_p1_reg__ge
1309
#define A__NAME__lt arm_instr_store_w1_signed_halfword_u0_p1_reg__lt
1310
#define A__NAME__gt arm_instr_store_w1_signed_halfword_u0_p1_reg__gt
1311
#define A__NAME__le arm_instr_store_w1_signed_halfword_u0_p1_reg__le
1312
#define A__NAME_PC arm_instr_store_w1_signed_halfword_u0_p1_reg_pc
1313
#define A__NAME_PC__eq arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__eq
1314
#define A__NAME_PC__ne arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ne
1315
#define A__NAME_PC__cs arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cs
1316
#define A__NAME_PC__cc arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__cc
1317
#define A__NAME_PC__mi arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__mi
1318
#define A__NAME_PC__pl arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__pl
1319
#define A__NAME_PC__vs arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vs
1320
#define A__NAME_PC__vc arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__vc
1321
#define A__NAME_PC__hi arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__hi
1322
#define A__NAME_PC__ls arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ls
1323
#define A__NAME_PC__ge arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__ge
1324
#define A__NAME_PC__lt arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__lt
1325
#define A__NAME_PC__gt arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__gt
1326
#define A__NAME_PC__le arm_instr_store_w1_signed_halfword_u0_p1_reg_pc__le
1327
#define A__SIGNED
1328
#define A__W
1329
#define A__H
1330
#define A__P
1331
#define A__REG
1332
#include "
cpu_arm_instr_loadstore.cc
"
1333
#undef A__SIGNED
1334
#undef A__W
1335
#undef A__H
1336
#undef A__P
1337
#undef A__REG
1338
#undef A__NAME__eq
1339
#undef A__NAME__ne
1340
#undef A__NAME__cs
1341
#undef A__NAME__cc
1342
#undef A__NAME__mi
1343
#undef A__NAME__pl
1344
#undef A__NAME__vs
1345
#undef A__NAME__vc
1346
#undef A__NAME__hi
1347
#undef A__NAME__ls
1348
#undef A__NAME__ge
1349
#undef A__NAME__lt
1350
#undef A__NAME__gt
1351
#undef A__NAME__le
1352
#undef A__NAME_PC__eq
1353
#undef A__NAME_PC__ne
1354
#undef A__NAME_PC__cs
1355
#undef A__NAME_PC__cc
1356
#undef A__NAME_PC__mi
1357
#undef A__NAME_PC__pl
1358
#undef A__NAME_PC__vs
1359
#undef A__NAME_PC__vc
1360
#undef A__NAME_PC__hi
1361
#undef A__NAME_PC__ls
1362
#undef A__NAME_PC__ge
1363
#undef A__NAME_PC__lt
1364
#undef A__NAME_PC__gt
1365
#undef A__NAME_PC__le
1366
#undef A__NAME__general
1367
#undef A__NAME_PC
1368
#undef A__NAME
1369
#define A__NAME__general arm_instr_load_w1_signed_halfword_u0_p1_reg__general
1370
#define A__NAME arm_instr_load_w1_signed_halfword_u0_p1_reg
1371
#define A__NAME__eq arm_instr_load_w1_signed_halfword_u0_p1_reg__eq
1372
#define A__NAME__ne arm_instr_load_w1_signed_halfword_u0_p1_reg__ne
1373
#define A__NAME__cs arm_instr_load_w1_signed_halfword_u0_p1_reg__cs
1374
#define A__NAME__cc arm_instr_load_w1_signed_halfword_u0_p1_reg__cc
1375
#define A__NAME__mi arm_instr_load_w1_signed_halfword_u0_p1_reg__mi
1376
#define A__NAME__pl arm_instr_load_w1_signed_halfword_u0_p1_reg__pl
1377
#define A__NAME__vs arm_instr_load_w1_signed_halfword_u0_p1_reg__vs
1378
#define A__NAME__vc arm_instr_load_w1_signed_halfword_u0_p1_reg__vc
1379
#define A__NAME__hi arm_instr_load_w1_signed_halfword_u0_p1_reg__hi
1380
#define A__NAME__ls arm_instr_load_w1_signed_halfword_u0_p1_reg__ls
1381
#define A__NAME__ge arm_instr_load_w1_signed_halfword_u0_p1_reg__ge
1382
#define A__NAME__lt arm_instr_load_w1_signed_halfword_u0_p1_reg__lt
1383
#define A__NAME__gt arm_instr_load_w1_signed_halfword_u0_p1_reg__gt
1384
#define A__NAME__le arm_instr_load_w1_signed_halfword_u0_p1_reg__le
1385
#define A__NAME_PC arm_instr_load_w1_signed_halfword_u0_p1_reg_pc
1386
#define A__NAME_PC__eq arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__eq
1387
#define A__NAME_PC__ne arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ne
1388
#define A__NAME_PC__cs arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cs
1389
#define A__NAME_PC__cc arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__cc
1390
#define A__NAME_PC__mi arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__mi
1391
#define A__NAME_PC__pl arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__pl
1392
#define A__NAME_PC__vs arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vs
1393
#define A__NAME_PC__vc arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__vc
1394
#define A__NAME_PC__hi arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__hi
1395
#define A__NAME_PC__ls arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ls
1396
#define A__NAME_PC__ge arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__ge
1397
#define A__NAME_PC__lt arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__lt
1398
#define A__NAME_PC__gt arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__gt
1399
#define A__NAME_PC__le arm_instr_load_w1_signed_halfword_u0_p1_reg_pc__le
1400
#define A__SIGNED
1401
#define A__L
1402
#define A__W
1403
#define A__H
1404
#define A__P
1405
#define A__REG
1406
#include "
cpu_arm_instr_loadstore.cc
"
1407
#undef A__SIGNED
1408
#undef A__L
1409
#undef A__W
1410
#undef A__H
1411
#undef A__P
1412
#undef A__REG
1413
#undef A__NAME__eq
1414
#undef A__NAME__ne
1415
#undef A__NAME__cs
1416
#undef A__NAME__cc
1417
#undef A__NAME__mi
1418
#undef A__NAME__pl
1419
#undef A__NAME__vs
1420
#undef A__NAME__vc
1421
#undef A__NAME__hi
1422
#undef A__NAME__ls
1423
#undef A__NAME__ge
1424
#undef A__NAME__lt
1425
#undef A__NAME__gt
1426
#undef A__NAME__le
1427
#undef A__NAME_PC__eq
1428
#undef A__NAME_PC__ne
1429
#undef A__NAME_PC__cs
1430
#undef A__NAME_PC__cc
1431
#undef A__NAME_PC__mi
1432
#undef A__NAME_PC__pl
1433
#undef A__NAME_PC__vs
1434
#undef A__NAME_PC__vc
1435
#undef A__NAME_PC__hi
1436
#undef A__NAME_PC__ls
1437
#undef A__NAME_PC__ge
1438
#undef A__NAME_PC__lt
1439
#undef A__NAME_PC__gt
1440
#undef A__NAME_PC__le
1441
#undef A__NAME__general
1442
#undef A__NAME_PC
1443
#undef A__NAME
arm_instr_nop
void arm_instr_nop(struct cpu *, struct arm_instr_call *)
misc.h
machine.h
cpu.h
cpu_arm_instr_loadstore.cc
arm_pc_to_pointers
void arm_pc_to_pointers(struct cpu *)
cpu
Definition:
cpu.h:326
arm_instr_invalid
void arm_instr_invalid(struct cpu *, struct arm_instr_call *)
memory.h
quick_pc_to_pointers.h
Generated on Tue Mar 24 2020 14:04:48 for GXemul by
1.8.17