dev_mvme187.cc Source File

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dev_mvme187.cc
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1 /*
2  * Copyright (C) 2007-2009 Anders Gavare. All rights reserved.
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions are met:
6  *
7  * 1. Redistributions of source code must retain the above copyright
8  * notice, this list of conditions and the following disclaimer.
9  * 2. Redistributions in binary form must reproduce the above copyright
10  * notice, this list of conditions and the following disclaimer in the
11  * documentation and/or other materials provided with the distribution.
12  * 3. The name of the author may not be used to endorse or promote products
13  * derived from this software without specific prior written permission.
14  *
15  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18  * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
19  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25  * SUCH DAMAGE.
26  *
27  *
28  * COMMENT: MVME187-specific devices and control registers
29  */
30 
31 #include <stdio.h>
32 #include <stdlib.h>
33 #include <string.h>
34 
35 #include "cpu.h"
36 #include "device.h"
37 #include "emul.h"
38 #include "machine.h"
39 #include "memory.h"
40 #include "misc.h"
41 
42 #include "thirdparty/mvme187.h"
44 #include "thirdparty/m8820x.h"
45 
46 
47 struct mvme187_data {
48  struct memcreg memcreg;
49 };
50 
51 
52 DEVICE_ACCESS(mvme187_memc)
53 {
54  uint64_t idata = 0, odata = 0;
55  struct mvme187_data *d = (struct mvme187_data *) extra;
56  int controller = 0;
57 
58  if (writeflag == MEM_WRITE)
59  idata = memory_readmax64(cpu, data, len);
60 
61  if (relative_addr & 0x100) {
62  controller = 1;
63  relative_addr &= ~0x100;
64  }
65 
66  odata = ((uint8_t*)&d->memcreg)[relative_addr];
67 
68  switch (relative_addr) {
69 
70  case 0x00: /* chipid */
71  case 0x04: /* chiprev */
72  break;
73 
74  case 0x08: /* memconf */
75  if (writeflag == MEM_WRITE) {
76  fatal("mvme187_memc: Write to relative_addr %i not yet"
77  " implemented!\n");
78  exit(1);
79  }
80  break;
81 
82  default:fatal("[ mvme187_memc: unimplemented %s offset 0x%x",
83  writeflag == MEM_WRITE? "write to" : "read from",
84  (int) relative_addr);
85  if (writeflag == MEM_WRITE)
86  fatal(": 0x%x", (int)idata);
87  fatal(" ]\n");
88  exit(1);
89  }
90 
91  if (writeflag == MEM_READ)
92  memory_writemax64(cpu, data, len, odata);
93 
94  return 1;
95 }
96 
97 
98 DEVINIT(mvme187)
99 {
100  struct mvme187_data *d;
101  char tmpstr[300];
102  struct m8820x_cmmu *cmmu;
103  int size_per_memc, r;
104 
105  CHECK_ALLOCATION(d = (struct mvme187_data *) malloc(sizeof(struct mvme187_data)));
106  memset(d, 0, sizeof(struct mvme187_data));
107 
108 
109  /*
110  * Two memory controllers per MVME187 machine:
111  */
112 
113  size_per_memc = devinit->machine->physical_ram_in_mb / 2 * 1048576;
114  for (r=0; ; r++) {
115  if (MEMC_MEMCONF_RTOB(r) > size_per_memc) {
116  r--;
117  break;
118  }
119  }
120 
122  d->memcreg.memc_chiprev = 1;
123  d->memcreg.memc_memconf = r;
124 
126  MVME187_MEM_CTLR, 0x200, dev_mvme187_memc_access, (void *)d,
127  DM_DEFAULT, NULL);
128 
129 
130  /* Instruction CMMU: */
131  CHECK_ALLOCATION(cmmu = (struct m8820x_cmmu *) malloc(sizeof(struct m8820x_cmmu)));
132  memset(cmmu, 0, sizeof(struct m8820x_cmmu));
133 
135  cd.m88k.cmmu[0] = cmmu;
136  /* This is a 88200, revision 9: */
137  cmmu->reg[CMMU_IDR] = (M88200_ID << 21) | (9 << 16);
138  snprintf(tmpstr, sizeof(tmpstr),
139  "m8820x addr=0x%x addr2=0", MVME187_SBC_CMMU_I);
140  device_add(devinit->machine, tmpstr);
141 
142  /* ... and data CMMU: */
143  CHECK_ALLOCATION(cmmu = (struct m8820x_cmmu *) malloc(sizeof(struct m8820x_cmmu)));
144  memset(cmmu, 0, sizeof(struct m8820x_cmmu));
145 
147  cd.m88k.cmmu[1] = cmmu;
148  /* This is also a 88200, revision 9: */
149  cmmu->reg[CMMU_IDR] = (M88200_ID << 21) | (9 << 16);
150  cmmu->batc[8] = BATC8;
151  cmmu->batc[9] = BATC9;
152  snprintf(tmpstr, sizeof(tmpstr),
153  "m8820x addr=0x%x addr2=1", MVME187_SBC_CMMU_D);
154  device_add(devinit->machine, tmpstr);
155 
156 
157  return 1;
158 }
159 
m88k_cpu::cmmu
struct m8820x_cmmu * cmmu[MAX_M8820X_CMMUS]
Definition: cpu_m88k.h:250
data
u_short data
Definition: siireg.h:79
memcreg::memc_chipid
volatile u_char memc_chipid
Definition: mvme_memcreg.h:32
memcreg::memc_memconf
volatile u_char memc_memconf
Definition: mvme_memcreg.h:36
machine::bootstrap_cpu
int bootstrap_cpu
Definition: machine.h:136
MEMC_MEMCONF_RTOB
#define MEMC_MEMCONF_RTOB(x)
Definition: mvme_memcreg.h:38
machine::cpus
struct cpu ** cpus
Definition: machine.h:140
machine::physical_ram_in_mb
int physical_ram_in_mb
Definition: machine.h:147
MEMC_CHIPID
#define MEMC_CHIPID
Definition: mvme_memcreg.h:100
memory_device_register
void memory_device_register(struct memory *mem, const char *, uint64_t baseaddr, uint64_t len, int(*f)(struct cpu *, struct memory *, uint64_t, unsigned char *, size_t, int, void *), void *extra, int flags, unsigned char *dyntrans_data)
Definition: memory.cc:339
MEM_READ
#define MEM_READ
Definition: memory.h:116
mvme187_data::memcreg
struct memcreg memcreg
Definition: dev_mvme187.cc:48
DM_DEFAULT
#define DM_DEFAULT
Definition: memory.h:130
devinit::machine
struct machine * machine
Definition: device.h:41
m8820x.h
device.h
mvme187_data
Definition: dev_mvme187.cc:47
DEVINIT
DEVINIT(mvme187)
Definition: dev_mvme187.cc:98
MEM_WRITE
#define MEM_WRITE
Definition: memory.h:117
cpu::m88k
struct m88k_cpu m88k
Definition: cpu.h:442
m8820x_cmmu::reg
uint32_t reg[M8820X_LENGTH/sizeof(uint32_t)]
Definition: M88K_CPUComponent.h:324
fatal
void fatal(const char *fmt,...)
Definition: main.cc:152
MVME187_MEM_CTLR
#define MVME187_MEM_CTLR
Definition: mvme187.h:64
misc.h
DEVICE_ACCESS
DEVICE_ACCESS(mvme187_memc)
Definition: dev_mvme187.cc:52
memcreg::memc_chiprev
volatile u_char memc_chiprev
Definition: mvme_memcreg.h:34
memory_readmax64
uint64_t memory_readmax64(struct cpu *cpu, unsigned char *buf, int len)
Definition: memory.cc:55
device_add
void * device_add(struct machine *machine, const char *name_and_params)
Definition: device.cc:252
machine.h
MVME187_SBC_CMMU_D
#define MVME187_SBC_CMMU_D
Definition: mvme187.h:57
devinit::name
char * name
Definition: device.h:43
emul.h
devinit
Definition: device.h:40
cpu.h
CMMU_IDR
#define CMMU_IDR
Definition: m8820x.h:60
machine::memory
struct memory * memory
Definition: machine.h:126
memcreg
Definition: mvme_memcreg.h:31
BATC9
#define BATC9
Definition: m8820x.h:177
mvme187.h
m8820x_cmmu
Definition: M88K_CPUComponent.h:323
BATC8
#define BATC8
Definition: m8820x.h:176
M88200_ID
#define M88200_ID
Definition: m8820x.h:152
MVME187_SBC_CMMU_I
#define MVME187_SBC_CMMU_I
Definition: mvme187.h:56
memory_writemax64
void memory_writemax64(struct cpu *cpu, unsigned char *buf, int len, uint64_t data)
Definition: memory.cc:89
m8820x_cmmu::batc
uint32_t batc[N_M88200_BATC_REGS]
Definition: M88K_CPUComponent.h:325
mvme_memcreg.h
cpu
Definition: cpu.h:326
memory.h
CHECK_ALLOCATION
#define CHECK_ALLOCATION(ptr)
Definition: misc.h:239

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