CPUComponent.cc Source File
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42 , m_cpuArchitecture(cpuArchitecture)
46 , m_lastUnassembleVaddr(0)
47 , m_hasUsedUnassemble(false)
49 , m_showFunctionTraceCall(false)
50 , m_showFunctionTraceReturn(false)
51 , m_functionCallTraceDepth(0)
52 , m_nrOfTracedFunctionCalls(0)
53 , m_addressDataBus(NULL)
93 m_symbolRegistry.
Clear();
111 for (
int i=0; i<n; ++i) {
114 if (arg > -1000 && arg < 1000) {
117 ss.flags(std::ios::hex);
118 ss <<
"0x" << (uint64_t)arg;
152 if (traceReturnValid) {
157 if (retval > -1000 && retval < 1000) {
158 ss <<
"= " << retval;
160 ss.flags(std::ios::hex);
161 ss <<
"= 0x" << (uint64_t)retval;
181 names.push_back(
"dump");
182 names.push_back(
"registers");
183 names.push_back(
"unassemble");
192 if (methodName ==
"dump")
195 if (methodName ==
"unassemble")
204 const vector<string>& arguments)
206 if (methodName ==
"dump") {
209 if (arguments.size() > 1) {
214 if (arguments.size() == 1) {
220 ss.flags(std::ios::hex);
224 const int nRows = 16;
225 for (
int i=0; i<nRows; i++) {
226 const size_t len = 16;
227 unsigned char data[len];
231 ss.flags(std::ios::hex);
233 if (vaddr > 0xffffffff)
238 ss << std::setfill(
'0') << vaddr;
241 for (k=0; k<len; ++k) {
248 for (k=0; k<len; ++k) {
252 ss << std::setw(2) << std::setfill(
'0');
261 for (k=0; k<len; ++k) {
284 if (methodName ==
"registers") {
289 if (methodName ==
"unassemble") {
294 if (arguments.size() > 1) {
299 if (arguments.size() == 1) {
305 ss.flags(std::ios::hex);
309 const int nRows = 20;
312 vaddr =
Unassemble(nRows,
true, vaddr, output);
327 vector< vector<string> > outputRows;
329 for (
int i=0; i<nRows; i++) {
330 outputRows.push_back(vector<string>());
334 size_t maxLen =
sizeof(uint32_t);
335 maxLen +=
sizeof(uint32_t);
336 unsigned char instruction[maxLen];
339 for (
size_t k=0; k<maxLen; ++k) {
346 outputRows[outputRows.size()-1].push_back(
"<" +
symbol +
">");
347 outputRows.push_back(vector<string>());
351 ss.flags(std::ios::hex | std::ios::showbase);
359 outputRows[outputRows.size()-1].push_back(ss.str());
363 ss2 <<
"\tmemory could not be read";
365 ss2 <<
"; no address/data bus connected to the CPU";
368 outputRows[outputRows.size()-1].push_back(ss2.str());
371 vector<string> result;
374 maxLen, instruction, result);
377 for (
size_t j=0; j<result.size(); ++j)
378 outputRows[outputRows.size()-1].push_back(result[j]);
383 vector<size_t> columnWidths;
385 for (row=0; row<outputRows.size(); ++row) {
386 size_t nColumns = outputRows[row].size();
393 if (columnWidths.size() < nColumns)
394 columnWidths.resize(nColumns);
396 for (
size_t col=0; col<nColumns; ++col) {
397 const string& s = outputRows[row][col];
398 if (s.length() > columnWidths[col])
399 columnWidths[col] = s.length();
403 for (row=0; row<outputRows.size(); ++row) {
404 const vector<string>& rowVector = outputRows[row];
406 for (
size_t i=0; i<rowVector.size(); ++i) {
414 size_t len = rowVector[i].length();
415 output << rowVector[i];
417 int nspaces = columnWidths[i] - len;
418 for (
int j=0; j<nspaces; ++j)
446 if (!LookupAddressDataBus(gxemul)) {
448 " has neither any child components nor any parent component"
449 " that can act as address/data bus, so there is no place"
450 " to read instructions from\n");
458 bool CPUComponent::LookupAddressDataBus(
GXemul* gxemul)
473 bool multipleChildBussesFound =
false;
474 for (
size_t i=0; i<children.size(); ++i) {
476 if (childBus != NULL) {
478 multipleChildBussesFound =
true;
480 choosenChild = children[i];
484 if (multipleChildBussesFound && gxemul != NULL)
486 "multiple child components that can act as address/data busses; "
492 while (!component.
IsNULL()) {
509 "been implemented for this CPU type. TODO.\n");
521 if (!LookupAddressDataBus())
537 if (!LookupAddressDataBus())
553 if (!LookupAddressDataBus())
569 if (!LookupAddressDataBus())
583 if (!LookupAddressDataBus())
599 if (!LookupAddressDataBus())
615 if (!LookupAddressDataBus())
631 if (!LookupAddressDataBus())
650 static void Test_CPUComponent_IsStable()
656 static void Test_CPUComponent_Create()
664 static void Test_CPUComponent_PreRunCheck()
679 static void Test_CPUComponent_Methods_Reexecutableness()
685 " without args",
cpu->MethodMayBeReexecutedWithoutArgs(
"dump") ==
true);
688 " without args",
cpu->MethodMayBeReexecutedWithoutArgs(
"registers") ==
false);
691 " without args",
cpu->MethodMayBeReexecutedWithoutArgs(
"unassemble") ==
true);
694 " without args",
cpu->MethodMayBeReexecutedWithoutArgs(
"nonexistant") ==
false);
699 UNITTEST(Test_CPUComponent_IsStable);
701 UNITTEST(Test_CPUComponent_PreRunCheck);
702 UNITTEST(Test_CPUComponent_Methods_Reexecutableness);
bool PreRunCheck(GXemul *gxemul)
Checks the state of this component and all its children, before starting execution.
virtual void FlushCachedStateForComponent()
Resets the cached state of this component.
virtual bool ReadData(uint8_t &data, Endianness endianness=BigEndian)=0
Reads 8-bit data from the currently selected address.
bool m_showFunctionTraceReturn
bool IsNULL() const
Checks whether or not an object is referenced by the reference counted pointer.
bool AddVariable(const string &name, T *variablePointer)
Adds a state variable of type T to the Component.
SymbolRegistry & GetSymbolRegistry()
Gets a reference to the CPU's symbol registry.
bool IsInterrupting() const
Returns whether or not the current emulation is being interrupted.
void Clear()
Clears the registry.
virtual bool MethodMayBeReexecutedWithoutArgs(const string &methodName) const
Returns whether a method name may be re-executed without args.
uint64_t Unassemble(int nRows, bool indicatePC, uint64_t vaddr, ostream &output)
int32_t m_functionCallTraceDepth
CommandInterpreter & GetCommandInterpreter()
Gets a reference to the CommandInterpreter.
virtual AddressDataBus * AsAddressDataBus()
Returns the component's AddressDataBus interface, if any.
virtual bool PreRunCheckForComponent(GXemul *gxemul)
Checks the state of this component, before starting execution.
virtual int FunctionTraceArgumentCount()
virtual size_t DisassembleInstruction(uint64_t vaddr, size_t maxLen, unsigned char *instruction, vector< string > &result)=0
Disassembles an instruction into readable strings.
AddressDataBus * m_addressDataBus
#define UNITTESTS(class)
Helper for unit test case execution.
UI * GetUI()
Gets an UI reference for outputting debug messages during runtime.
virtual bool FunctionTraceReturnImpl(int64_t &retval)
virtual void FlushCachedStateForComponent()
Resets the cached state of this component.
virtual bool VirtualToPhysical(uint64_t vaddr, uint64_t &paddr, bool &writable)=0
Virtual to physical address translation (MMU).
#define UNITTEST(functionname)
Helper for unit test case execution.
virtual void GetMethodNames(vector< string > &names) const
Retrieves a component's implemented method names.
virtual void GetMethodNames(vector< string > &names) const
Retrieves a component's implemented method names.
static void Assert(const string &strFailMessage, bool condition)
Asserts that a boolean condition is correct.
Components & GetChildren()
Gets pointers to child components.
virtual bool WriteData(const uint8_t &data, Endianness endianness=BigEndian)=0
Writes 8-bit data to the currently selected address.
virtual void ExecuteMethod(GXemul *gxemul, const string &methodName, const vector< string > &arguments)
Executes a method on the component.
refcount_ptr< Component > GetRootComponent()
Gets a pointer to the root configuration component.
virtual void ShowDebugMessage(const string &msg)=0
Shows a debug message.
virtual double GetCurrentFrequency() const
Returns the current frequency (in Hz) that the component runs at.
string LookupAddress(uint64_t vaddr, bool allowOffset) const
Looks up an address.
static refcount_ptr< Component > CreateComponent(const string &componentNameAndOptionalArgs, GXemul *gxemul=NULL)
Creates a component given a short component name.
int64_t m_nrOfTracedFunctionCalls
virtual void AddressSelect(uint64_t address)=0
Place an address on the bus.
Component * GetParent()
Gets this component's parent component, if any.
string GenerateShortestPossiblePath() const
Generates a short string representation of the path to the Component.
bool FunctionTraceReturn()
CPUComponent(const string &className, const string &cpuKind)
Constructs a CPUComponent.
bool RunCommand(const string &command, bool *pSuccess=NULL)
Runs a command, given as a string.
virtual bool WriteData(const uint8_t &data, Endianness endianness)
Writes 8-bit data to the currently selected address.
UI * GetUI()
Gets a pointer to the GXemul instance' active UI.
virtual bool MethodMayBeReexecutedWithoutArgs(const string &methodName) const
Returns whether a method name may be re-executed without args.
virtual int64_t FunctionTraceArgument(int n)
virtual void ResetState()
Resets the state variables of this component.
A Component is a node in the configuration tree that makes up an emulation setup.
virtual string VirtualAddressAsString(uint64_t vaddr)
Format a virtual address as a displayable string.
virtual bool ReadData(uint8_t &data, Endianness endianness)
Reads 8-bit data from the currently selected address.
vector< refcount_ptr< Component > > Components
uint64_t m_lastUnassembleVaddr
static bool HasAttribute(const string &name, const string &attributeName)
Checks if a component has a specific attribute.
virtual void ExecuteMethod(GXemul *gxemul, const string &methodName, const vector< string > &arguments)
Executes a method on the component.
virtual CPUComponent * AsCPUComponent()
Returns the component's CPUComponent interface.
An interface for implementing components that read/write data via an address bus.
virtual uint64_t PCtoInstructionAddress(uint64_t pc)
Convert PC value to instuction address.
bool m_showFunctionTraceCall
virtual void ShowRegisters(GXemul *gxemul, const vector< string > &arguments) const
virtual void ResetState()
Resets the state variables of this component.
virtual AddressDataBus * AsAddressDataBus()
Returns the component's AddressDataBus interface, if any.
uint64_t m_delaySlotTarget
bool m_exceptionOrAbortInDelaySlot
virtual void AddressSelect(uint64_t address)
Place an address on the bus.
GXemul * GetRunningGXemulInstance()
Returns a reference to the current GXemul instance.
A base-class for processors Component implementations.
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