gtreg.h Source File

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gtreg.h
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1 /*
2  * This is basically malta/dev/gtreg.h from NetBSD, with additional
3  * defines that Linux uses. Symbol names are practically the same in
4  * NetBSD and Linux, which simplifies things.
5  *
6  * Also a few defines are from cobalt/dev/gtreg.h from NetBSD.
7  *
8  * TODO: Find a better gtreg.h.
9  *
10  * Originally imported from NetBSD into GXemul 2006-09-23, when this
11  * file did not have a copyright text in NetBSD's tree. The following
12  * copyright text was found in a FreeBSD tree instead but mentions
13  * NetBSD, so most likely it is valid.
14  */
15 
16 /*-
17  * Copyright (c) 1997, 1998, 2001 The NetBSD Foundation, Inc.
18  * All rights reserved.
19  *
20  * This code is derived from software contributed to The NetBSD Foundation
21  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
22  * NASA Ames Research Center.
23  *
24  * Redistribution and use in source and binary forms, with or without
25  * modification, are permitted provided that the following conditions
26  * are met:
27  * 1. Redistributions of source code must retain the above copyright
28  * notice, this list of conditions and the following disclaimer.
29  * 2. Redistributions in binary form must reproduce the above copyright
30  * notice, this list of conditions and the following disclaimer in the
31  * documentation and/or other materials provided with the distribution.
32  *
33  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
34  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
35  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
36  * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
37  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
38  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
39  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
40  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
41  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
42  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
43  * POSSIBILITY OF SUCH DAMAGE.
44  *
45  * $FreeBSD$
46  */
47 
48 #ifndef GTREG_H
49 #define GTREG_H
50 
51 #define GT_REGVAL(x) *((volatile u_int32_t *) \
52  (MIPS_PHYS_TO_KSEG1(MALTA_CORECTRL_BASE + (x))))
53 
54 /* CPU Configuration Register Map */
55 #define GT_CPU_INT 0x000
56 #define GT_MULTIGT 0x120
57 
58 /* CPU Address Decode Register Map */
59 #define GT_PCI0IOLD_OFS 0x048
60 #define GT_PCI0IOHD_OFS 0x050
61 #define GT_PCI0M0LD_OFS 0x058
62 #define GT_PCI0M0HD_OFS 0x060
63 #define GT_PCI0M1LD_OFS 0x080
64 #define GT_PCI0M1HD_OFS 0x088
65 #define GT_PCI0IOREMAP_OFS 0x0f0
66 #define GT_PCI0M0REMAP_OFS 0x0f8
67 #define GT_PCI0M1REMAP_OFS 0x100
68 
69 #define GT_N_DECODE_REGS (0x108 / 8)
70 
71 /* CPU Error Report Register Map */
72 
73 /* CPU Sync Barrier Register Map */
74 
75 /* SDRAM and Device Address Decode Register Map */
76 
77 /* SDRAM Configuration Register Map */
78 
79 /* SDRAM Parameters Register Map */
80 
81 /* ECC Register Map */
82 
83 /* Device Parameters Register Map */
84 
85 /* DMA Record Register Map */
86 
87 /* DMA Arbiter Register Map */
88 
89 /* Timer/Counter Register Map */
90 //#define GT_TC_0 0x850
91 //#define GT_TC_1 0x854
92 //#define GT_TC_2 0x858
93 //#define GT_TC_3 0x85c
94 //#define GT_TC_CONTROL 0x864
95 #define GT_TIMER_COUNTER0 0x850
96 #define GT_TIMER_COUNTER1 0x854
97 #define GT_TIMER_COUNTER2 0x858
98 #define GT_TIMER_COUNTER3 0x85c
99 
100 #define GT_TIMER_CTRL 0x864
101 #define ENTC0 0x01
102 #define TCSEL0 0x02
103 #define ENTC1 0x04
104 #define TCSEL1 0x08
105 #define ENTC2 0x10
106 #define TCSEL2 0x20
107 #define ENTC3 0x40
108 #define TCSEL3 0x80
109 
110 /* PCI Internal Register Map */
111 #define GT_PCI0_CMD_OFS 0xc00
112 #define GT_PCI0_CFG_ADDR 0xcf8
113 #define GT_PCI0_CFG_DATA 0xcfc
114 #define GT_PCI0_INTR_ACK 0xc34
115 
116 /* Interrupts Register Map */
117 #define GT_INTR_CAUSE 0xc18
118 #define GTIC_INTSUM 0x00000001
119 #define GTIC_MEMOUT 0x00000002
120 #define GTIC_DMAOUT 0x00000004
121 #define GTIC_CPUOUT 0x00000008
122 #define GTIC_DMA0COMP 0x00000010
123 #define GTIC_DMA1COMP 0x00000020
124 #define GTIC_DMA2COMP 0x00000040
125 #define GTIC_DMA3COMP 0x00000080
126 #define GTIC_T0EXP 0x00000100
127 #define GTIC_T1EXP 0x00000200
128 #define GTIC_T2EXP 0x00000400
129 #define GTIC_T3EXP 0x00000800
130 #define GTIC_MASRDERR0 0x00001000
131 #define GTIC_SLVWRERR0 0x00002000
132 #define GTIC_MASWRERR0 0x00004000
133 #define GTIC_SLVRDERR0 0x00008000
134 #define GTIC_ADDRERR0 0x00010000
135 #define GTIC_MEMERR 0x00020000
136 #define GTIC_MASABORT0 0x00040000
137 #define GTIC_TARABORT0 0x00080000
138 #define GTIC_RETRYCNT0 0x00100000
139 #define GTIC_PMCINT_0 0x00200000
140 #define GTIC_CPUINT 0x0c300000
141 #define GTIC_PCINT 0xc3000000
142 #define GTIC_CPUINTSUM 0x40000000
143 #define GTIC_PCIINTSUM 0x80000000
144 
145 /* PCI Configuration Register Map */
146 //#define GT_PCICONFIGBASE 0
147 //#define GT_PCIDID BONITO(GT_PCICONFIGBASE + 0x00)
148 //#define GT_PCICMD BONITO(GT_PCICONFIGBASE + 0x04)
149 //#define GT_PCICLASS BONITO(GT_PCICONFIGBASE + 0x08)
150 //#define GT_PCILTIMER BONITO(GT_PCICONFIGBASE + 0x0c)
151 //#define GT_PCIBASE0 BONITO(GT_PCICONFIGBASE + 0x10)
152 //#define GT_PCIBASE1 BONITO(GT_PCICONFIGBASE + 0x14)
153 //#define GT_PCIBASE2 BONITO(GT_PCICONFIGBASE + 0x18)
154 //#define GT_PCIEXPRBASE BONITO(GT_PCICONFIGBASE + 0x30)
155 //#define GT_PCIINT BONITO(GT_PCICONFIGBASE + 0x3c)
156 
157 /* PCI Configuration, Function 1, Register Map */
158 
159 /* I2O Support Register Map */
160 
161 #endif /* !GTREG_H */

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