sh4_tmureg.h Source File

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sh4_tmureg.h
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1 /* $NetBSD: tmureg.h,v 1.11 2006/03/04 01:55:03 uwe Exp $ */
2 
3 #ifndef _SH3_TMUREG_H_
4 #define _SH3_TMUREG_H_
5 
6 /*-
7  * Copyright (C) 1999 SAITOH Masanobu. All rights reserved.
8  *
9  * Redistribution and use in source and binary forms, with or without
10  * modification, are permitted provided that the following conditions
11  * are met:
12  * 1. Redistributions of source code must retain the above copyright
13  * notice, this list of conditions and the following disclaimer.
14  * 2. Redistributions in binary form must reproduce the above copyright
15  * notice, this list of conditions and the following disclaimer in the
16  * documentation and/or other materials provided with the distribution.
17  * 3. The name of the author may not be used to endorse or promote products
18  * derived from this software without specific prior written permission.
19  *
20  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
21  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
22  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
23  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
24  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
25  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
26  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
27  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
28  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
29  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
30  */
31 
32 /* #include <sh3/devreg.h> */
33 
34 /*
35  * TMU
36  */
37 #define SH3_TOCR 0xfffffe90
38 #define SH3_TSTR 0xfffffe92
39 #define SH3_TCOR0 0xfffffe94
40 #define SH3_TCNT0 0xfffffe98
41 #define SH3_TCR0 0xfffffe9c
42 #define SH3_TCOR1 0xfffffea0
43 #define SH3_TCNT1 0xfffffea4
44 #define SH3_TCR1 0xfffffea8
45 #define SH3_TCOR2 0xfffffeac
46 #define SH3_TCNT2 0xfffffeb0
47 #define SH3_TCR2 0xfffffeb4
48 #define SH3_TCPR2 0xfffffeb8
49 
50 #define SH4_TOCR 0xffd80000
51 #define SH4_TSTR 0xffd80004
52 #define SH4_TCOR0 0xffd80008
53 #define SH4_TCNT0 0xffd8000c
54 #define SH4_TCR0 0xffd80010
55 #define SH4_TCOR1 0xffd80014
56 #define SH4_TCNT1 0xffd80018
57 #define SH4_TCR1 0xffd8001c
58 #define SH4_TCOR2 0xffd80020
59 #define SH4_TCNT2 0xffd80024
60 #define SH4_TCR2 0xffd80028
61 #define SH4_TCPR2 0xffd8002c
62 #define SH4_TSTR2 0xfe100004
63 #define SH4_TCOR3 0xfe100008
64 #define SH4_TCNT3 0xfe10000c
65 #define SH4_TCR3 0xfe100010
66 #define SH4_TCOR4 0xfe100014
67 #define SH4_TCNT4 0xfe100018
68 #define SH4_TCR4 0xfe10001c
69 
70 
71 #define TOCR_TCOE 0x01
72 #define TSTR_STR2 0x04
73 #define TSTR_STR1 0x02
74 #define TSTR_STR0 0x01
75 #define TCR_ICPF 0x0200
76 #define TCR_UNF 0x0100
77 #define TCR_ICPE1 0x0080
78 #define TCR_ICPE0 0x0040
79 #define TCR_UNIE 0x0020
80 #define TCR_CKEG1 0x0010
81 #define TCR_CKEG0 0x0008
82 #define TCR_TPSC2 0x0004
83 #define TCR_TPSC1 0x0002
84 #define TCR_TPSC0 0x0001
85 #define TCR_TPSC_P4 0x0000
86 #define TCR_TPSC_P16 0x0001
87 #define TCR_TPSC_P64 0x0002
88 #define TCR_TPSC_P256 0x0003
89 #define SH3_TCR_TPSC_RTC 0x0004
90 #define SH3_TCR_TPSC_TCLK 0x0005
91 #define SH4_TCR_TPSC_P1024 0x0004
92 #define SH4_TCR_TPSC_RTC 0x0006
93 #define SH4_TCR_TPSC_TCLK 0x0007
94 #define SH4_TSTR2_STR4 0x02
95 #define SH4_TSTR2_STR3 0x01
96 
97 
98 #ifndef _LOCORE
99 #if defined(SH3) && defined(SH4)
100 extern uint32_t __sh_TOCR;
101 extern uint32_t __sh_TSTR;
102 extern uint32_t __sh_TCOR0;
103 extern uint32_t __sh_TCNT0;
104 extern uint32_t __sh_TCR0;
105 extern uint32_t __sh_TCOR1;
106 extern uint32_t __sh_TCNT1;
107 extern uint32_t __sh_TCR1;
108 extern uint32_t __sh_TCOR2;
109 extern uint32_t __sh_TCNT2;
110 extern uint32_t __sh_TCR2;
111 extern uint32_t __sh_TCPR2;
112 #endif /* SH3 && SH4 */
113 #endif /* !_LOCORE */
114 
115 #endif /* !_SH3_TMUREG_H_ */

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