99 #define wdt_reset() __asm__ __volatile__ ("wdr") 103 # define _WD_PS3_MASK _BV(WDP3) 105 # define _WD_PS3_MASK 0x00 109 # define _WD_CONTROL_REG WDTCSR 111 # define _WD_CONTROL_REG WDTCR 113 # define _WD_CONTROL_REG WDT 117 #define _WD_CHANGE_BIT WDTOE 119 #define _WD_CHANGE_BIT WDCE 135 #if defined(__AVR_XMEGA__) 149 #define wdt_enable(timeout) \ 152 __asm__ __volatile__ ( \ 153 "in __tmp_reg__, %[rampd]" "\n\t" \ 154 "out %[rampd], __zero_reg__" "\n\t" \ 155 "out %[ccp_reg], %[ioreg_cen_mask]" "\n\t" \ 156 "sts %[wdt_reg], %[wdt_enable_timeout]" "\n\t" \ 157 "1:lds %[tmp], %[wdt_status_reg]" "\n\t" \ 158 "sbrc %[tmp], %[wdt_syncbusy_bit]" "\n\t" \ 160 "out %[rampd], __tmp_reg__" "\n\t" \ 161 : [tmp] "=r" (temp) \ 162 : [rampd] "I" (_SFR_IO_ADDR(RAMPD)), \ 163 [ccp_reg] "I" (_SFR_IO_ADDR(CCP)), \ 164 [ioreg_cen_mask] "r" ((uint8_t)CCP_IOREG_gc), \ 165 [wdt_reg] "n" (_SFR_MEM_ADDR(WDT_CTRL)), \ 166 [wdt_enable_timeout] "r" ((uint8_t)(WDT_CEN_bm | WDT_ENABLE_bm | timeout)), \ 167 [wdt_status_reg] "n" (_SFR_MEM_ADDR(WDT_STATUS)), \ 168 [wdt_syncbusy_bit] "I" (WDT_SYNCBUSY_bm) \ 173 #define wdt_disable() \ 174 __asm__ __volatile__ ( \ 175 "in __tmp_reg__, %[rampd]" "\n\t" \ 176 "out %[rampd], __zero_reg__" "\n\t" \ 177 "out %[ccp_reg], %[ioreg_cen_mask]" "\n\t" \ 178 "sts %[wdt_reg], %[disable_mask]" "\n\t" \ 179 "out %[rampd], __tmp_reg__" "\n\t" \ 181 : [rampd] "I" (_SFR_IO_ADDR(RAMPD)), \ 182 [ccp_reg] "I" (_SFR_IO_ADDR(CCP)), \ 183 [ioreg_cen_mask] "r" ((uint8_t)CCP_IOREG_gc), \ 184 [wdt_reg] "n" (_SFR_MEM_ADDR(WDT_CTRL)), \ 185 [disable_mask] "r" ((uint8_t)((~WDT_ENABLE_bm) | WDT_CEN_bm)) \ 189 #elif defined(__AVR_TINY__) 191 #define wdt_enable(value) \ 192 __asm__ __volatile__ ( \ 193 "in __tmp_reg__,__SREG__" "\n\t" \ 196 "out %[CCPADDRESS],%[SIGNATURE]" "\n\t" \ 197 "out %[WDTREG],%[WDVALUE]" "\n\t" \ 198 "out __SREG__,__tmp_reg__" "\n\t" \ 200 : [CCPADDRESS] "I" (_SFR_IO_ADDR(CCP)), \ 201 [SIGNATURE] "r" ((uint8_t)0xD8), \ 202 [WDTREG] "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)), \ 203 [WDVALUE] "r" ((uint8_t)((value & 0x08 ? _WD_PS3_MASK : 0x00) \ 204 | _BV(WDE) | (value & 0x07) )) \ 208 #define wdt_disable() \ 211 __asm__ __volatile__ ( \ 212 "in __tmp_reg__,__SREG__" "\n\t" \ 215 "out %[CCPADDRESS],%[SIGNATURE]" "\n\t" \ 216 "in %[TEMP_WD],%[WDTREG]" "\n\t" \ 217 "cbr %[TEMP_WD],%[WDVALUE]" "\n\t" \ 218 "out %[WDTREG],%[TEMP_WD]" "\n\t" \ 219 "out __SREG__,__tmp_reg__" "\n\t" \ 221 : [CCPADDRESS] "I" (_SFR_IO_ADDR(CCP)), \ 222 [SIGNATURE] "r" ((uint8_t)0xD8), \ 223 [WDTREG] "I" (_SFR_IO_ADDR(_WD_CONTROL_REG)), \ 224 [TEMP_WD] "d" (temp_wd), \ 225 [WDVALUE] "n" (1 << WDE) \ 234 void wdt_enable (const
uint8_t value)
236 if (!_SFR_IO_REG_P (CCP) && !_SFR_IO_REG_P (_WD_CONTROL_REG))
238 __asm__ __volatile__ (
239 "in __tmp_reg__,__SREG__" "\n\t" 242 "sts %[CCPADDRESS],%[SIGNATURE]" "\n\t" 243 "sts %[WDTREG],%[WDVALUE]" "\n\t" 244 "out __SREG__,__tmp_reg__" "\n\t" 246 : [CCPADDRESS]
"n" (_SFR_MEM_ADDR(CCP)),
247 [SIGNATURE]
"r" ((
uint8_t)0xD8),
248 [WDTREG]
"n" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
249 [WDVALUE]
"r" ((
uint8_t)((value & 0x08 ? _WD_PS3_MASK : 0x00)
250 |
_BV(WDE) | (value & 0x07) ))
254 else if (!_SFR_IO_REG_P (CCP) && _SFR_IO_REG_P (_WD_CONTROL_REG))
256 __asm__ __volatile__ (
257 "in __tmp_reg__,__SREG__" "\n\t" 260 "sts %[CCPADDRESS],%[SIGNATURE]" "\n\t" 261 "out %[WDTREG],%[WDVALUE]" "\n\t" 262 "out __SREG__,__tmp_reg__" "\n\t" 264 : [CCPADDRESS]
"n" (_SFR_MEM_ADDR(CCP)),
265 [SIGNATURE]
"r" ((
uint8_t)0xD8),
266 [WDTREG]
"I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
267 [WDVALUE]
"r" ((
uint8_t)((value & 0x08 ? _WD_PS3_MASK : 0x00)
268 |
_BV(WDE) | (value & 0x07) ))
272 else if (_SFR_IO_REG_P (CCP) && !_SFR_IO_REG_P (_WD_CONTROL_REG))
274 __asm__ __volatile__ (
275 "in __tmp_reg__,__SREG__" "\n\t" 278 "out %[CCPADDRESS],%[SIGNATURE]" "\n\t" 279 "sts %[WDTREG],%[WDVALUE]" "\n\t" 280 "out __SREG__,__tmp_reg__" "\n\t" 282 : [CCPADDRESS]
"I" (_SFR_IO_ADDR(CCP)),
283 [SIGNATURE]
"r" ((
uint8_t)0xD8),
284 [WDTREG]
"n" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
285 [WDVALUE]
"r" ((
uint8_t)((value & 0x08 ? _WD_PS3_MASK : 0x00)
286 |
_BV(WDE) | (value & 0x07) ))
292 __asm__ __volatile__ (
293 "in __tmp_reg__,__SREG__" "\n\t" 296 "out %[CCPADDRESS],%[SIGNATURE]" "\n\t" 297 "out %[WDTREG],%[WDVALUE]" "\n\t" 298 "out __SREG__,__tmp_reg__" "\n\t" 300 : [CCPADDRESS]
"I" (_SFR_IO_ADDR(CCP)),
301 [SIGNATURE]
"r" ((
uint8_t)0xD8),
302 [WDTREG]
"I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
303 [WDVALUE]
"r" ((
uint8_t)((value & 0x08 ? _WD_PS3_MASK : 0x00)
304 |
_BV(WDE) | (value & 0x07) ))
312 void wdt_disable (
void)
314 if (!_SFR_IO_REG_P (CCP) && !_SFR_IO_REG_P(_WD_CONTROL_REG))
317 __asm__ __volatile__ (
318 "in __tmp_reg__,__SREG__" "\n\t" 321 "sts %[CCPADDRESS],%[SIGNATURE]" "\n\t" 322 "lds %[TEMP_WD],%[WDTREG]" "\n\t" 323 "cbr %[TEMP_WD],%[WDVALUE]" "\n\t" 324 "sts %[WDTREG],%[TEMP_WD]" "\n\t" 325 "out __SREG__,__tmp_reg__" "\n\t" 327 : [CCPADDRESS]
"n" (_SFR_MEM_ADDR(CCP)),
328 [SIGNATURE]
"r" ((
uint8_t)0xD8),
329 [WDTREG]
"n" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
330 [TEMP_WD]
"d" (temp_wd),
331 [WDVALUE]
"n" (1 << WDE)
335 else if (!_SFR_IO_REG_P (CCP) && _SFR_IO_REG_P(_WD_CONTROL_REG))
338 __asm__ __volatile__ (
339 "in __tmp_reg__,__SREG__" "\n\t" 342 "sts %[CCPADDRESS],%[SIGNATURE]" "\n\t" 343 "in %[TEMP_WD],%[WDTREG]" "\n\t" 344 "cbr %[TEMP_WD],%[WDVALUE]" "\n\t" 345 "out %[WDTREG],%[TEMP_WD]" "\n\t" 346 "out __SREG__,__tmp_reg__" "\n\t" 348 : [CCPADDRESS]
"n" (_SFR_MEM_ADDR(CCP)),
349 [SIGNATURE]
"r" ((
uint8_t)0xD8),
350 [WDTREG]
"I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
351 [TEMP_WD]
"d" (temp_wd),
352 [WDVALUE]
"n" (1 << WDE)
356 else if (_SFR_IO_REG_P (CCP) && !_SFR_IO_REG_P(_WD_CONTROL_REG))
359 __asm__ __volatile__ (
360 "in __tmp_reg__,__SREG__" "\n\t" 363 "out %[CCPADDRESS],%[SIGNATURE]" "\n\t" 364 "lds %[TEMP_WD],%[WDTREG]" "\n\t" 365 "cbr %[TEMP_WD],%[WDVALUE]" "\n\t" 366 "sts %[WDTREG],%[TEMP_WD]" "\n\t" 367 "out __SREG__,__tmp_reg__" "\n\t" 369 : [CCPADDRESS]
"I" (_SFR_IO_ADDR(CCP)),
370 [SIGNATURE]
"r" ((
uint8_t)0xD8),
371 [WDTREG]
"n" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
372 [TEMP_WD]
"d" (temp_wd),
373 [WDVALUE]
"n" (1 << WDE)
380 __asm__ __volatile__ (
381 "in __tmp_reg__,__SREG__" "\n\t" 384 "out %[CCPADDRESS],%[SIGNATURE]" "\n\t" 385 "in %[TEMP_WD],%[WDTREG]" "\n\t" 386 "cbr %[TEMP_WD],%[WDVALUE]" "\n\t" 387 "out %[WDTREG],%[TEMP_WD]" "\n\t" 388 "out __SREG__,__tmp_reg__" "\n\t" 390 : [CCPADDRESS]
"I" (_SFR_IO_ADDR(CCP)),
391 [SIGNATURE]
"r" ((
uint8_t)0xD8),
392 [WDTREG]
"I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
393 [TEMP_WD]
"d" (temp_wd),
394 [WDVALUE]
"n" (1 << WDE)
404 void wdt_enable (const
uint8_t value)
406 if (_SFR_IO_REG_P (_WD_CONTROL_REG))
408 __asm__ __volatile__ (
409 "in __tmp_reg__,__SREG__" "\n\t" 413 "out __SREG__,__tmp_reg__" "\n\t" 416 :
"I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
418 "r" ((
uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) |
419 _BV(WDE) | (value & 0x07)) )
425 __asm__ __volatile__ (
426 "in __tmp_reg__,__SREG__" "\n\t" 430 "out __SREG__,__tmp_reg__" "\n\t" 433 :
"n" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
435 "r" ((
uint8_t) ((value & 0x08 ? _WD_PS3_MASK : 0x00) |
436 _BV(WDE) | (value & 0x07)) )
444 void wdt_disable (
void)
446 if (_SFR_IO_REG_P (_WD_CONTROL_REG))
449 __asm__ __volatile__ (
450 "in __tmp_reg__,__SREG__" "\n\t" 453 "in %[TEMPREG],%[WDTREG]" "\n\t" 454 "ori %[TEMPREG],%[WDCE_WDE]" "\n\t" 455 "out %[WDTREG],%[TEMPREG]" "\n\t" 456 "out %[WDTREG],__zero_reg__" "\n\t" 457 "out __SREG__,__tmp_reg__" "\n\t" 458 : [TEMPREG]
"=d" (temp_reg)
459 : [WDTREG]
"I" (_SFR_IO_ADDR(_WD_CONTROL_REG)),
467 __asm__ __volatile__ (
468 "in __tmp_reg__,__SREG__" "\n\t" 471 "lds %[TEMPREG],%[WDTREG]" "\n\t" 472 "ori %[TEMPREG],%[WDCE_WDE]" "\n\t" 473 "sts %[WDTREG],%[TEMPREG]" "\n\t" 474 "sts %[WDTREG],__zero_reg__" "\n\t" 475 "out __SREG__,__tmp_reg__" "\n\t" 476 : [TEMPREG]
"=d" (temp_reg)
477 : [WDTREG]
"n" (_SFR_MEM_ADDR(_WD_CONTROL_REG)),
538 #if defined(__DOXYGEN__) || defined(WDP3)
unsigned char uint8_t
Definition: stdint.h:79
#define _BV(bit)
Definition: sfr_defs.h:208
static __inline__ __attribute__((__always_inline__)) void wdt_enable(const uint8_t value)
Definition: wdt.h:403